1 // Copyright (c) 2017, Tobias Mueller tm(at)tm3d.de
\r
2 // All rights reserved.
\r
4 // Redistribution and use in source and binary forms, with or without
\r
5 // modification, are permitted provided that the following conditions are
\r
8 // * Redistributions of source code must retain the above copyright
\r
9 // notice, this list of conditions and the following disclaimer.
\r
10 // * Redistributions in binary form must reproduce the above copyright
\r
11 // notice, this list of conditions and the following disclaimer in the
\r
12 // documentation and/or other materials provided with the
\r
14 // * All advertising materials mentioning features or use of this
\r
15 // software must display the following acknowledgement: This product
\r
16 // includes software developed by tm3d.de and its contributors.
\r
17 // * Neither the name of tm3d.de nor the names of its contributors may
\r
18 // be used to endorse or promote products derived from this software
\r
19 // without specific prior written permission.
\r
21 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
\r
22 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
\r
23 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
\r
24 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
\r
25 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
\r
26 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
\r
27 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
\r
28 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
\r
29 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
\r
30 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
\r
31 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
\r
33 #define F_CPU 8000000UL
\r
35 #include <avr/interrupt.h>
\r
36 #include <util/delay.h>
\r
37 #include <avr/wdt.h>
\r
38 #include <avr/sleep.h>
\r
39 #include <avr/pgmspace.h>
\r
40 #include "../common/I2C/USI_TWI_Master.h"
\r
41 #include "../common/I2C/CDM7160.h"
\r
42 extern void OWINIT();
\r
43 extern void EXTERN_SLEEP();
\r
45 //uint8_t owid[8]={0x20, 0xA2, 0xD9, 0x84, 0x00, 0x16, 0x02, 0x5D};/**/
\r
46 uint8_t owid[8]={0x20, 0xB3, 0xD9, 0x84, 0x00, 0x16, 0x02, 0x31};/**/
\r
47 uint8_t config_info[26]={0x10,13,0x0,0x0, 0,0, 0,0,0x02,16,0,0x00,0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00};
\r
49 #error "Variable not correct"
\r
52 extern uint8_t mode;
\r
53 extern uint8_t gcontrol;
\r
54 extern uint8_t reset_indicator;
\r
55 extern uint8_t alarmflag;
\r
56 volatile uint8_t wdcounter=10;
\r
59 #if defined(__AVR_ATtiny24__)||defined(__AVR_ATtiny44__) || defined(__AVR_ATtiny84__) || defined(__AVR_ATtiny24A__)||defined(__AVR_ATtiny44A__) || defined(__AVR_ATtiny84A__)
\r
60 ISR(WATCHDOG_vect) {
\r
65 if (reset_indicator==1) reset_indicator++;
\r
66 else if (reset_indicator==2) mode=0;
\r
70 volatile uint8_t bytes[0x20];
\r
110 volatile pack_t pack;
\r
143 PORTB=0xFF-(1<<PORTB0); //Schalter kann gegen Masse sein und zieht dann immer Strom
\r
144 DDRB|=(1<<PORTB0); //Als Ausgang und 0
\r
149 ACSR|=(1<<ACD); //Disable Comparator
\r
150 ADCSRB|=(1<<ACME); //Disable Analog multiplexer
\r
151 MCUCR &=~(1<<PUD); //All Pins Pullup...
\r
155 WDTCSR |= ((1<<WDCE) ); // Enable the WD Change Bit//| (1<<WDE)
\r
156 WDTCSR |= (1<<WDIE) | // Enable WDT Interrupt
\r
157 (1<<WDP3) | (1<<WDP0); // Set Timeout to ~8 seconds
\r
162 USI_TWI_Master_Initialise();
\r
163 CDM7160softReset();
\r
166 CDM7160setMode(0); //Power Down Mode
\r
168 CDM7160setAvCount(0x3F);
\r
169 CDM7160setFMode(1);
\r
170 CO2=CDM7160getCO2();
\r
176 //DDRB|=(1<<PINB1);
\r
180 if (wdcounter>2) {
\r
182 CO2=CDM7160getCO2();
\r
193 //PORTB|=(1<<PINB1);
\r
196 for(uint8_t i=0;i<4;i++){
\r
197 if (pack.convc1&bb1) {
\r
198 if (pack.convc2&(bb)) {pack.bytes[i*2]=0;pack.bytes[i*2+1]=0;}
\r
200 if (pack.convc2&(bb)) {pack.bytes[i*2]=0xFF;pack.bytes[i*2+1]=0xFF;}
\r
206 if (pack.convc1&1) {
\r
208 cli();pack.A=CO2;sei();
\r
212 if (pack.CSA2&0x08) //AEH
\r
213 if (pack.bytes[1]>pack.HA) {alarmflag=1;pack.CSA2|=0x20;}
\r
214 if (pack.CSA2&0x04) //AEL
\r
215 if (pack.bytes[1]<pack.LA) {alarmflag=1;pack.CSA2|=0x10;}
\r
218 if (pack.convc1&2) {
\r
220 cli();pack.B=0;sei();
\r
221 if (pack.CSB2&0x08) //AEH
\r
222 if (pack.bytes[1]>pack.HB) {alarmflag=1;pack.CSB2|=0x20;}
\r
223 if (pack.CSB2&0x04) //AEL
\r
224 if (pack.bytes[1]<pack.LB) {alarmflag=1;pack.CSB2|=0x10;}
\r
227 if (pack.convc1&4) {
\r
229 cli();pack.C=0;sei();
\r
230 if (pack.CSC2&0x08) //AEH
\r
231 if (pack.bytes[1]>pack.HC) {alarmflag=1;pack.CSC2|=0x20;}
\r
232 if (pack.CSC2&0x04) //AEL
\r
233 if (pack.bytes[1]<pack.LC) {alarmflag=1;pack.CSC2|=0x10;}
\r
235 if (pack.convc1&8) {
\r
237 cli();pack.D=0;sei();
\r
238 if (pack.CSD2&0x08) //AEH
\r
239 if (pack.bytes[1]>pack.HD) {alarmflag=1;pack.CSD2|=0x20;}
\r
240 if (pack.CSD2&0x04) //AEL
\r
241 if (pack.bytes[1]<pack.LD) {alarmflag=1;pack.CSD2|=0x10;}
\r
245 //PORTB&=~(1<<PINB1);
\r
249 for(uint8_t i=0;i<4;i++) {
\r
250 if (pack.bytes[8+i*2]&0x80) { //Chanel as output
\r
251 if (pack.bytes[8+i*2]&0x40) {
\r
262 #if defined(__AVR_ATtiny25__)||defined(__AVR_ATtiny45__) || defined(__AVR_ATtiny85__)
\r
263 if (((TIMSK & (1<<TOIE0))==0)&& (mode==0))
\r
265 #if defined(__AVR_ATtiny24__)||defined(__AVR_ATtiny44__) || defined(__AVR_ATtiny84__) ||defined(__AVR_ATtiny24A__)||defined(__AVR_ATtiny44A__) || defined(__AVR_ATtiny84A__)
\r
266 if (((TIMSK0 & (1<<TOIE0))==0)&& (mode==0))
\r
270 MCUCR|=(1<<SE)|(1<<SM1);
\r
271 MCUCR&=~(1<<ISC01);
\r