1 // Copyright (c) 2015, Tobias Mueller tm(at)tm3d.de
2 // All rights reserved.
4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions are
8 // * Redistributions of source code must retain the above copyright
9 // notice, this list of conditions and the following disclaimer.
10 // * Redistributions in binary form must reproduce the above copyright
11 // notice, this list of conditions and the following disclaimer in the
12 // documentation and/or other materials provided with the
14 // * All advertising materials mentioning features or use of this
15 // software must display the following acknowledgement: This product
16 // includes software developed by tm3d.de and its contributors.
17 // * Neither the name of tm3d.de nor the names of its contributors may
18 // be used to endorse or promote products derived from this software
19 // without specific prior written permission.
21 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 .macro cljmp val,addr; Weiter sprung, wenn das ziel zu weit entfernt fuer brxx
46 .macro cset val,mod ;Nur der Mode wird gesetzt. Abkuerzung da oft nur das noch bleibt
58 #define OW_READ_ROM_COMMAND 1
60 #define OW_SEARCHROMS 3 ;next send two bit
61 #define OW_SEARCHROMR 4 ; next resive master answer
63 #define OW_READ_COMMAND 6
64 #define OW_FWCONFIGINFO 7
67 #ifdef _CHANGEABLE_ID_
68 #define OW_WRITE_NEWID 8
69 #define OW_READ_NEWID 9
70 #define OW_SET_NEWID 10
71 #define OW_FIRST_COMMAND 11
75 .macro CHANGE_ID_COMMANDS
76 cset 0x75,OW_WRITE_NEWID
77 cljmp 0xA7,hrc_set_readid
78 cljmp 0x79,hrc_set_setid
83 #define OW_FIRST_COMMAND 8
87 ; test auf run flasher command 0x88 in h_readcommand
92 1: ldi r_temp,0 ;Anderes Kommando flashmarker zuruecksetzen...
93 sts flashmarker,r_temp
98 cljmp 0x85,hrc_fw_configinfo
102 #ifdef _CHANGEABLE_ID_
103 ; lesen der ID aus dem EEPROM beim Start
105 ldi r_temp2,lo8(E2END)
108 out _SFR_IO_ADDR(EEARH), zh
113 sbic _SFR_IO_ADDR(EECR), EEPE
114 rjmp read_EEPROM_ID_loop
115 out _SFR_IO_ADDR(EEARL),r_temp2
116 sbi _SFR_IO_ADDR(EECR), EERE
117 in r_rwbyte,_SFR_IO_ADDR(EEDR)
119 breq read_EEPROM_ID_end
124 brne read_EEPROM_ID_loop
135 rjmp handle_end_no_bcount // sleep eventuell reset, nichts tun und auf Timeout warten
136 rjmp h_readromcommand
143 #ifdef _CHANGEABLE_ID_
154 cset 0x55,OW_MATCHROM
155 cjmp 0xF0,hrc_set_searchrom
156 cjmp 0xCC,hrc_start_read_command ;skip rom
157 cjmp 0x33,hrc_set_read_rom
158 cjmp 0xEC,hrc_set_alarm_search
160 rjmp handle_end_sleep
165 lds r_temp,flashmarker
167 brne hrc_jmp_flasher_inc
172 ret ; Direkter Sprung zum Bootloader
175 sts flashmarker,r_temp
176 rjmp handle_end_sleep
181 lds r_rwbyte,owid ;erstes Byte lesen
182 rjmp h_searchrom_next_bit
184 hrc_start_read_command: ;Skip rom und Matchrom ok...
185 ldi r_mode,OW_READ_COMMAND
190 ldi r_mode,OW_READROM
194 hrc_set_alarm_search:
197 brne hrc_set_searchrom ;alarm flag nicht 0 also gehe zu searchrom
199 rjmp handle_end_sleep
203 ldi r_mode,OW_FWCONFIGINFO
209 ;---------------------------------------------------
211 ;---------------------------------------------------
219 rjmp handle_end_sleep
223 breq hrc_start_read_command ;Starten von Read Command
228 ;---------------------------------------------------
230 ;---------------------------------------------------
233 h_searchrom_next_bit: ;Setup next Bit of ID
234 sts srbyte,r_rwbyte ;erstes Byte speichern von der Aufrufenden Ebene
236 com r_rwbyte ; negieren
237 ror r_temp2 ; erstes unnegiertes bit in Carry
238 rol r_rwbyte ;und dann als erstes bit in r_rwbyte
240 ldi r_bcount,0x40 ; zwei bits sensden dann zu Searchromr
241 ldi r_mode,OW_SEARCHROMR
242 rjmp handle_end_no_bcount
246 h_searchroms: ; Modus Send zwei bit
248 sbrc r_rwbyte,7 ; bit gesetz (1 empfangen)
250 lds r_bcount,srbyte ;r_bcount wird am ende gesetzt
253 rjmp h_searchroms_next ; Vergleich des letzen gelesenen bits mit der id
258 rjmp handle_end_sleep
259 h_searchroms_next: ; Setup next bit
260 inc r_bytep ; zaehler der Bits erhoehen
261 sbrc r_bytep,6 ; 64 bit erreicht
262 rjmp h_searchrom_end_ok ;alles ok auf Command warten
265 brne h_searchroms_next_bit ; bit zwischen 0 und 8
266 mov r_bcount,r_bytep ; next Byte lesen
271 configZ owid,r_bcount
274 rjmp h_searchrom_next_bit
276 h_searchroms_next_bit: ;next Bit lesen
277 ;sts srbytep,r_bcount
279 lsr r_rwbyte ;aktuelles byte weiterschieben r_rwbyte hier zweckefrei verwendet
280 rjmp h_searchrom_next_bit ;algemeine routine zum vorbereiten
283 rjmp hrc_start_read_command
287 ldi r_mode,OW_SEARCHROMS
289 rjmp handle_end_no_bcount
292 ;---------------------------------------------------
294 ;---------------------------------------------------
303 rjmp handle_end_sleep
306 ;---------------------------------------------------
308 ;---------------------------------------------------
312 breq h_fwconfiginfo_crc
315 breq h_fwconfiginfo_all
316 #elif defined _CRC16_
318 breq h_fwconfiginfo_crc2
320 breq h_fwconfiginfo_all
323 breq h_fwconfiginfo_all
324 #warning No CRC known code implemented
326 configZ config_info,r_bytep
336 rjmp handle_end_sleep
339 ;---------------------------------------------------
340 ; CHANGE ROM FUNCTIONS
341 ;---------------------------------------------------
344 #ifdef _CHANGEABLE_ID_
347 configZ newid,r_bytep
353 rjmp handle_end_sleep
357 ldi r_mode,OW_READ_NEWID
362 configZ newid,r_bytep
367 rjmp handle_end_sleep
370 ldi r_mode,OW_SET_NEWID
371 ;ldi r_bytep,1 ;start to write in 2
372 rjmp handle_end_inc ;set r_bytep to 1!!!
378 brne h_setid_bad_code_all
385 rjmp h_setid_bad_code_all ;sollte eigentlich nicht passieren
393 ldi r_temp2,lo8(E2END)
397 ;ldi r_temp,0 ;kommt nicht vor das ein E2ROM genau n*256+(0 bis 7) byte gross ist
399 out _SFR_IO_ADDR(EEARH),zh
403 h_setid_EEPROM_write:
404 sbic _SFR_IO_ADDR(EECR), EEPE
405 rjmp h_setid_EEPROM_write
406 ldi r_temp, (0<<EEPM1)|(0<<EEPM0)
407 out _SFR_IO_ADDR(EECR), r_temp
408 ;nur adresse L schreiben H bleibt aus oben genannten grund gleich.
409 out _SFR_IO_ADDR(EEARL),r_temp2
411 out _SFR_IO_ADDR(EEDR), r_rwbyte
412 sbi _SFR_IO_ADDR(EECR), EEMPE
413 sbi _SFR_IO_ADDR(EECR), EEPE
417 brne h_setid_EEPROM_write
419 h_setid_bad_code_all:
420 rjmp handle_end_sleep
438 ; check for bootloader jumper
439 ;vor allen anderen Registerconfigs
441 ldi r_temp,(1<<PUD) ;enable pullup
442 out _SFR_IO_ADDR(MCUCR) ,r_temp
443 sbi _SFR_IO_ADDR(PORTA),PINA5 ;internal pullup on PINA5
444 sbi _SFR_IO_ADDR(PORTA),PINA4 ;internal pullup on PINA4
446 sbis _SFR_IO_ADDR(PINA),PINA5
447 rjmp owinit_botest_end ;PinA5 nicht auf 1
448 sbis _SFR_IO_ADDR(PINA),PINA4
449 rjmp owinit_botest_end ;PinA4 nicht auf 1
450 cbi _SFR_IO_ADDR(PORTA),PINA4
451 sbi _SFR_IO_ADDR(DDRA),PINA4 ;PINA4 AUSGANG und 0
453 sbic _SFR_IO_ADDR(PINA),PINA5
454 rjmp owinit_botest_end ;PINA5 nicht 0.... nicht verbunden
455 cbi _SFR_IO_ADDR(DDRA),PINA4
460 ret ; Direkter Sprung zum Bootloader*/
463 HW_INIT //Microcontroller specific
464 CHIP_INIT //1-Wire device specific
465 #ifdef _CHANGEABLE_ID_
481 sts mode,r_temp ;SLEEP