extern void OWINIT(void);\r
extern void EXTERN_SLEEP(void);\r
\r
+\r
//#define FHEM_PLATINE\r
+//#define JOE_M\r
+#define W1DAQ\r
\r
volatile uint8_t owid1[8]={0x1D, 0x40, 0xDA, 0x84, 0x00, 0x00, 0x05, 0xBD};/**/\r
volatile uint8_t owid2[8]={0x1D, 0x41, 0xDA, 0x84, 0x00, 0x00, 0x05, 0x8A};/**/\r
-#if RAMEND>260 //defined(__AVR_ATtiny84__) ||defined(__AVR_ATtiny84A__) \r
+#if RAMEND>260 //defined(__AVR_ATtiny84__) ||defined(__AVR_ATtiny84A__)\r
uint8_t config_info1[26]={9,13,9,13,9,13,9,13,0x02,19,19,19,19,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}; //+2 for CRC\r
uint8_t config_info2[26]={9,13,9,13,9,13,9,13,0x02,19,19,19,19,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}; //+2 for CRC\r
#endif\r
counterpack_t pack1;\r
\r
//The Memory of both Chips is the same, beause of the small memory of ATTiny44\r
-#define pack2 pack1 \r
+#define pack2 pack1\r
\r
volatile uint8_t lastcps;\r
typedef union {\r
//LEDS\r#define LPIN_CH2 (1<<PINB0)\r#define LDD_CH2 DDRB\r#define LPORT_CH2 PORTB\r#define LPIN_CH3 (1<<PINA5)\r#define LDD_CH3 DDRA\r#define LPORT_CH3 PORTA\r#define LPIN_CH0 (1<<PINA7)\r#define LDD_CH0 DDRA\r#define LPORT_CH0 PORTA\r#define LPIN_CH1 (1<<PINB1)\r#define LDD_CH1 DDRB\r#define LPORT_CH1 PORTB\r
\r
#define LED2_ON LPORT_CH2|=LPIN_CH2;\r
-#else\r
+#endif\r
+\r
+#ifdef JOE_M\r
#define LED2_ON\r
#define PIN_CH2 (1<<PINA4)\r
#define PIN_CH3 (1<<PINA5)\r
#define PIN_CH1 (1<<PINA7)\r
#endif\r
\r
+#ifdef W1DAQ\r
+#define PIN_CH3 (1<<PINA1)\r
+#define PIN_CH2 (1<<PINA0)\r
+#define PIN_CH1 (1<<PINA7)\r
+#define PIN_CH0 (1<<PINA3)\r
+//LEDS\r#define LPIN_CH0 (1<<PINB1)\r#define LDD_CH0 DDRB\r#define LPORT_CH0 PORTB\r#define LPIN_CH1 (1<<PINB1)\r#define LDD_CH1 DDRB\r#define LPORT_CH1 PORTB\r#define LPIN_CH2 (1<<PINB1)\r#define LDD_CH2 DDRB\r#define LPORT_CH2 PORTB\r#define LPIN_CH3 (1<<PINB1)\r#define LDD_CH3 DDRB\r#define LPORT_CH3 PORTB\r\r
+#define LED2_ON LPORT_CH2&=~LPIN_CH2;\r
+#endif\r
+\r
+\r
#define TEST_TIMER ((TIMSK0 & (1<<TOIE0))==0)\r
\r
#endif\r
PORTB&=~(1<<PINB1);\r
CLKPR=0x80;\r
CLKPR=0;\r
+#ifdef FHEM_PLATINE\r
+ LPORT_CH1|=LPIN_CH1;\r
+#endif\r
+#ifdef W1DAQ\r
+ LPORT_CH1&=~LPIN_CH1;\r
+#endif\r
GIFR|=(1<<INTF0);\r
}\r
}\r
PORTA&=~(PIN_CH2|PIN_CH3);\r
#endif\r
\r
- #ifdef FHEM_PLATINE //LEDs\r
+ #if defined(FHEM_PLATINE) || defined(W1DAQ) //LEDs\r
LDD_CH0|=LPIN_CH0;\r LPORT_CH0&=~LPIN_CH0;\r LDD_CH1|=LPIN_CH1;\r LPORT_CH1&=~LPIN_CH1;\r LDD_CH2|=LPIN_CH2;\r LPORT_CH2&=~LPIN_CH2;\r LDD_CH3|=LPIN_CH3;\r LPORT_CH3&=~LPIN_CH3;\r
#endif\r
\r
\r
LPORT_CH0|=LPIN_CH0;\r _delay_ms(500);\r LPORT_CH0&=~LPIN_CH0;\r
#endif\r
+#ifdef W1DAQ\r
+ LPORT_CH0&=~LPIN_CH0;\r
+ _delay_ms(500);\r LPORT_CH0|=LPIN_CH0;\r#endif\r
sei();\r
while(1) {\r
- #ifdef FHEM_PLATINE\r
+#ifdef FHEM_PLATINE\r
if (LPORT_CH2&LPIN_CH2) {\r _delay_ms(50);\r LPORT_CH2&=~LPIN_CH2;\r }\r
+ if (LPORT_CH1&LPIN_CH1) {\r _delay_ms(50);\r LPORT_CH1&=~LPIN_CH1;\r }\r
+#endif\r
+#ifdef W1DAQ\r
+ if ((LPORT_CH2&LPIN_CH2)==0) {\r _delay_ms(50);\r LPORT_CH2|=LPIN_CH2;\r }\r
#endif\r
#ifndef FHEM_PLATINE\r
if ((PINB&(1<<PORTB0))==0) { //Jumper gesetzt ->Ruecksetzen\r
//count Resets\r changefromeeprom=1;\r
}\r
}\r
-#endif\r
+ #endif\r
+ if (((TIMSK0 & (1<<TOIE0))==0)&& (mode==0)) {\r
+ MCUCR|=(1<<SE)|(1<<SM1);\r
+ \r
+ MCUCR&=~(1<<ISC01);\r
+ } else {\r
+ MCUCR|=(1<<SE);\r
+ MCUCR&=~(1<<SM1);\r
+ }\r
+ asm("SLEEP");\r
+\r
+/*\r
MCUCR|=(1<<SE);\r
MCUCR&=~(1<<SM1);\r
- asm("SLEEP");\r
+ asm("SLEEP");*/\r
}\r
\r
\r