2 // Copyright (c) 2015, Tobias Mueller tm(at)tm3d.de
3 // All rights reserved.
5 // Redistribution and use in source and binary forms, with or without
6 // modification, are permitted provided that the following conditions are
9 // * Redistributions of source code must retain the above copyright
10 // notice, this list of conditions and the following disclaimer.
11 // * Redistributions in binary form must reproduce the above copyright
12 // notice, this list of conditions and the following disclaimer in the
13 // documentation and/or other materials provided with the
15 // * All advertising materials mentioning features or use of this
16 // software must display the following acknowledgement: This product
17 // includes software developed by tm3d.de and its contributors.
18 // * Neither the name of tm3d.de nor the names of its contributors may
19 // be used to endorse or promote products derived from this software
20 // without specific prior written permission.
22 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
23 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
24 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
25 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
26 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
27 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
28 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
29 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
30 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
32 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 #define F_CPU 8000000UL
36 #include <avr/interrupt.h>
37 #include <util/delay.h>
39 #include <avr/sleep.h>
40 #include <avr/pgmspace.h>
44 uint8_t owid[8]={0x20, 0xA2, 0xD9, 0x84, 0x00, 0x16, 0x02, 0x5D};/**/
47 #error "Variable not correct"
51 extern uint8_t gcontrol;
52 extern uint8_t reset_indicator;
53 extern uint8_t alarmflag;
57 volatile uint8_t bytes[0x20];
128 MCUCR &=~(1<<PUD); //All Pins Pullup...
130 PORTA&=~((1<<PINA0)|(1<<PINA1)|(1<<PINA2)|(1<<PINA3));
131 ADCSRA=(1<<ADEN)|(1<<ADPS2)|(1<<ADPS1)|(1<<ADPS0);
145 for(uint8_t i=0;i<4;i++){
146 if (pack.convc1&bb1) {
147 if (pack.convc2&(bb)) {pack.bytes[i*2]=0;pack.bytes[i*2+1]=0;}
149 if (pack.convc2&(bb)) {pack.bytes[i*2]=0xFF;pack.bytes[i*2+1]=0xFF;}
156 if (pack.CSA2&0x01) ADMUX=0; else ADMUX=0x80;
159 while ((ADCSRA&(1<<ADSC)));
160 cli();pack.A=ADC;sei();
162 if (pack.CSA2&0x08) //AEH
163 if (pack.bytes[1]>pack.HA) {alarmflag=1;pack.CSA2|=0x20;}
164 if (pack.CSA2&0x04) //AEL
165 if (pack.bytes[1]<pack.LA) {alarmflag=1;pack.CSA2|=0x10;}
169 if (pack.CSB2&0x01) ADMUX=1; else ADMUX=0x81;
172 while ((ADCSRA&(1<<ADSC)));
173 cli();pack.B=ADC;sei();
174 if (pack.CSB2&0x08) //AEH
175 if (pack.bytes[1]>pack.HB) {alarmflag=1;pack.CSB2|=0x20;}
176 if (pack.CSB2&0x04) //AEL
177 if (pack.bytes[1]<pack.LB) {alarmflag=1;pack.CSB2|=0x10;}
181 if (pack.CSC2&0x01) ADMUX=2; else ADMUX=0x82;
184 while ((ADCSRA&(1<<ADSC)));
185 cli();pack.C=ADC;sei();
186 if (pack.CSC2&0x08) //AEH
187 if (pack.bytes[1]>pack.HC) {alarmflag=1;pack.CSC2|=0x20;}
188 if (pack.CSC2&0x04) //AEL
189 if (pack.bytes[1]<pack.LC) {alarmflag=1;pack.CSC2|=0x10;}
192 if (pack.CSD2&0x01) ADMUX=3; else ADMUX=0x83;
195 while ((ADCSRA&(1<<ADSC)));
196 cli();pack.D=ADC;sei();
197 if (pack.CSD2&0x08) //AEH
198 if (pack.bytes[1]>pack.HD) {alarmflag=1;pack.CSD2|=0x20;}
199 if (pack.CSD2&0x04) //AEL
200 if (pack.bytes[1]<pack.LD) {alarmflag=1;pack.CSD2|=0x10;}
207 for(uint8_t i=0;i<4;i++) {
208 if (pack.bytes[8+i*2]&0x80) { //Chanel as output
209 if (pack.bytes[8+i*2]&0x40) {
220 #if defined(__AVR_ATtiny25__)||defined(__AVR_ATtiny45__) || defined(__AVR_ATtiny85__)
221 if (((TIMSK & (1<<TOIE0))==0)&& (mode==0))
223 #if defined(__AVR_ATtiny24__)||defined(__AVR_ATtiny44__) || defined(__AVR_ATtiny84__) ||defined(__AVR_ATtiny24A__)||defined(__AVR_ATtiny44A__) || defined(__AVR_ATtiny84A__)
224 if (((TIMSK0 & (1<<TOIE0))==0)&& (mode==0))
228 MCUCR|=(1<<SE)|(1<<SM1);