X-Git-Url: http://git.smho.de/gw/?a=blobdiff_plain;f=common%2FI2C%2FUSI_TWI_Master.h;h=19f3e88d061b5dda832f6bfbed38dab5a2be1cbd;hb=81a79648a168a1167c5ad97d4068621c1751a353;hp=f91c41b2131b17ff857e98208de305ba205588d5;hpb=a6a04f58e4afd20f206fdf4a8a7b3ce4062f1b67;p=owSlave2.git

diff --git a/common/I2C/USI_TWI_Master.h b/common/I2C/USI_TWI_Master.h
index f91c41b..19f3e88 100644
--- a/common/I2C/USI_TWI_Master.h
+++ b/common/I2C/USI_TWI_Master.h
@@ -31,8 +31,13 @@
 
 // Defines controlling timing limits
 #define TWI_FAST_MODE
-
+#ifdef  __4MHZ__
+#define SYS_CLK  4000.0  // [kHz]
+#else
 #define SYS_CLK   8000.0  // [kHz]
+#endif
+
+
 
 #ifdef TWI_FAST_MODE               // TWI FAST mode timing limits. SCL = 100-400kHz
   #define T2_TWI    ((SYS_CLK *1300) /1000000) +1 // >1,3us
@@ -116,12 +121,23 @@
 #define PIN_USI_SCL         PINA4
 #endif
 
+
+#if defined(__AVR_ATmega328__) | defined(__AVR_ATmega328P__) | defined(__AVR_ATmega328PB__)
+#define DDR_USI             DDRC
+#define PORT_USI            PORTC
+#define PIN_USI             PINC
+#define PORT_USI_SDA        PORTC4
+#define PORT_USI_SCL        PORTC5
+#define PIN_USI_SDA         PINC4
+#define PIN_USI_SCL         PINC5
+#endif
+
 // General defines
 #define TRUE  1
 #define FALSE 0
 
-#define ACK (1<<TWI_NACK_BIT )
-#define NO_ACK 0
+//#define ACK (1<<TWI_NACK_BIT )
+//#define NO_ACK 0
 
 
 //********** Prototypes **********//