// Copyright (c) 2015, Tobias Mueller tm(at)tm3d.de
// All rights reserved. 
// 
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// modification, are permitted provided that the following conditions are 
// met: 
// 
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//    includes software developed by tm3d.de and its contributors. 
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//#define __4M__

#define OW_PORT _SFR_IO_ADDR(PORTB) //1 Wire Port
#define OW_PIN _SFR_IO_ADDR(PINB) //1 Wire Pin as number
#define OW_PINN PORTB2
#define OW_DDR _SFR_IO_ADDR(DDRB)  //pin direction register
#define TCNT_REG _SFR_IO_ADDR(TCNT0)

#define DB_PORT _SFR_IO_ADDR(PORTB) //1 Wire Port
#define DB_PIN _SFR_IO_ADDR(PINB) //1 Wire Pin as number
#define DB_PINN PORTB1

#define SETZEROMARKER sbi _SFR_IO_ADDR(DDRB),5
#define RESETZEROMARKER cbi _SFR_IO_ADDR(DDRB),5
#define TESTZEROMARKER sbic _SFR_IO_ADDR(DDRB),5

;#define sdb sbi _SFR_IO_ADDR(PORTB),1
;#define cdb cbi _SFR_IO_ADDR(PORTB),1

#define TIMER_INTERRUPT TIM0_OVF_vect
#define PIN_INTERRIPT INT0_vect

#ifdef __4M__

#define OWT_MIN_RESET 70 
#define OWT_RESET2 40
#define OWT_RESET_PRESENT 15
#define OWT_PRESENT 50
#define OWT_WRITE 18
#define OWT_READ 5

#else

#define OWT_MIN_RESET 140
#define OWT_RESET2 80
#define OWT_RESET_PRESENT 30
#define OWT_PRESENT 130
#define OWT_WRITE 35
#define OWT_READ 12

#endif


.macro CLEAR_TOV_FLAG
	ldi r_temp,(1<<TOV0)
	out _SFR_IO_ADDR(TIFR),r_temp
.endm

.macro JMP_NO_TOV
	in r_temp, _SFR_IO_ADDR(TIFR)
	sbrc r_temp,TOV0 ; wenn ueberlauf gleiich weiter
.endm

.macro CLEAR_INTERRUPT_FLAG 
	ldi r_temp,(1<<INTF0);inerrupt flags durch 1 loeschen..... 0 macht nix
	out _SFR_IO_ADDR(GIFR),r_temp
.endm

.macro EN_TIM_INT
	in r_temp,_SFR_IO_ADDR(TIMSK)
	sbr r_temp,(1<<TOIE0)
	out _SFR_IO_ADDR(TIMSK),r_temp
	ldi r_temp,(1<<TOV0) ;inerrupt flags durch 1 loeschen..... 0 macht nix
	out _SFR_IO_ADDR(TIFR),r_temp
.endm

.macro DIS_TIM_INT
	in r_temp,_SFR_IO_ADDR(TIMSK)
	cbr r_temp,(1<<TOIE0)
	out _SFR_IO_ADDR(TIMSK),r_temp
.endm


.macro SET_FALLING
	in r_temp,_SFR_IO_ADDR(MCUCR)
	ori r_temp,(1<<ISC01)
	out	_SFR_IO_ADDR(MCUCR),r_temp
.endm


.macro SET_FALLING_RESET_SLEEP
	in r_temp,_SFR_IO_ADDR(MCUCR)
	ori r_temp,(1<<ISC01)
	andi r_temp,~(1<<SM1)
	out	_SFR_IO_ADDR(MCUCR),r_temp
.endm


.macro HW_INIT
	;set clock to 8 MHz
	ldi r_temp,0x80;
	out _SFR_IO_ADDR(CLKPR),r_temp
#ifdef __4M__
	ldi r_temp,(1<<CLKPS0)
#else
	ldi r_temp,0
#endif
	out _SFR_IO_ADDR(CLKPR),r_temp
	;Disable Timer int
	ldi r_temp,0
	out _SFR_IO_ADDR(TIMSK),r_temp ;; is default
	;Enable Pin int
	ldi r_temp,(1<<INT0)
	out _SFR_IO_ADDR(GIMSK),r_temp
	;Set Timerclock to Clock / 8 (2us)
	ldi r_temp,(1<<CS01)
	out _SFR_IO_ADDR(TCCR0B),r_temp
	;OWPin as input
	cbi OW_DDR,OW_PINN ;; is default.... 
	;set falling edge
	ldi r_temp,(1<<ISC01)
	out _SFR_IO_ADDR(MCUCR),r_temp
.endm