VOC, Programmer with 4MHz (posible)
authorTobias <tm@tm3d.de>
Fri, 23 Oct 2015 16:15:49 +0000 (18:15 +0200)
committerTobias <tm@tm3d.de>
Fri, 23 Oct 2015 16:15:49 +0000 (18:15 +0200)
15 files changed:
DS18B20_VOC/DS18B20_VOC.atsln [new file with mode: 0644]
DS18B20_VOC/DS18B20_VOC.c [new file with mode: 0644]
DS18B20_VOC/DS18B20_VOC.cproj [new file with mode: 0644]
DS18B20_VOC_DS2438_SHT/DS18B20_DS2438.c [new file with mode: 0644]
DS18B20_VOC_DS2438_SHT/DS18B20_VOC_DS2438_SHT.atsln [new file with mode: 0644]
DS18B20_VOC_DS2438_SHT/DS18B20_VOC_DS2438_SHT.cproj [new file with mode: 0644]
DS18B20_VOC_DS2438_SHT/MAX1164x.h [new file with mode: 0644]
common/I2C/MAX1164x.c [new file with mode: 0644]
common/I2C/MAX1164x.h.c [deleted file]
common/OWDS18B20.S [new file with mode: 0644]
common/OWDS18B20_DS2438.S [new file with mode: 0644]
programmer/programmer/programmer.asm
programmer/programmer/programmer.asmproj
programmer/programmer/programmer_4mhz.asm [new file with mode: 0644]
programmer/programmer/programmer_8MHz.asm [new file with mode: 0644]

diff --git a/DS18B20_VOC/DS18B20_VOC.atsln b/DS18B20_VOC/DS18B20_VOC.atsln
new file mode 100644 (file)
index 0000000..05272b9
--- /dev/null
@@ -0,0 +1,22 @@
+
+Microsoft Visual Studio Solution File, Format Version 12.00
+# Atmel Studio Solution File, Format Version 11.00
+VisualStudioVersion = 14.0.23107.0
+MinimumVisualStudioVersion = 10.0.40219.1
+Project("{54F91283-7BC4-4236-8FF9-10F437C3AD48}") = "DS18B20_VOC", "DS18B20_VOC.cproj", "{7A5672FE-8226-4158-B931-E1F36B9A8858}"
+EndProject
+Global
+       GlobalSection(SolutionConfigurationPlatforms) = preSolution
+               Debug|AVR = Debug|AVR
+               Release|AVR = Release|AVR
+       EndGlobalSection
+       GlobalSection(ProjectConfigurationPlatforms) = postSolution
+               {7A5672FE-8226-4158-B931-E1F36B9A8858}.Debug|AVR.ActiveCfg = Debug|AVR
+               {7A5672FE-8226-4158-B931-E1F36B9A8858}.Debug|AVR.Build.0 = Debug|AVR
+               {7A5672FE-8226-4158-B931-E1F36B9A8858}.Release|AVR.ActiveCfg = Release|AVR
+               {7A5672FE-8226-4158-B931-E1F36B9A8858}.Release|AVR.Build.0 = Release|AVR
+       EndGlobalSection
+       GlobalSection(SolutionProperties) = preSolution
+               HideSolutionNode = FALSE
+       EndGlobalSection
+EndGlobal
diff --git a/DS18B20_VOC/DS18B20_VOC.c b/DS18B20_VOC/DS18B20_VOC.c
new file mode 100644 (file)
index 0000000..3b14431
--- /dev/null
@@ -0,0 +1,185 @@
+
+// Copyright (c) 2015, Tobias Mueller tm(at)tm3d.de
+// All rights reserved.
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are
+// met:
+//
+//  * Redistributions of source code must retain the above copyright
+//    notice, this list of conditions and the following disclaimer.
+//  * Redistributions in binary form must reproduce the above copyright
+//    notice, this list of conditions and the following disclaimer in the
+//    documentation and/or other materials provided with the
+//    distribution.
+//  * All advertising materials mentioning features or use of this
+//    software must display the following acknowledgement: This product
+//    includes software developed by tm3d.de and its contributors.
+//  * Neither the name of tm3d.de nor the names of its contributors may
+//    be used to endorse or promote products derived from this software
+//    without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+#define F_CPU 8000000UL
+#include <avr/io.h>
+#include <avr/interrupt.h>
+#include <util/delay.h>
+#include <avr/wdt.h>
+#include <avr/sleep.h>
+#include <avr/pgmspace.h>
+#include "../common/I2C/USI_TWI_Master.h"
+#include "../common//I2C/MAX1164x.h"
+
+
+extern void OWINIT();
+
+extern void EXTERN_SLEEP();
+
+
+uint8_t owid[8]={0x28, 0xA2, 0xD9, 0x84, 0x00, 0x16, 0x77, 0x6B};/**/
+uint8_t config_info[16]={0x01,0x01, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00};
+       
+#if (owid>128) 
+#error "Variable not correct"
+#endif
+
+extern uint8_t mode;
+extern uint8_t gcontrol;
+extern uint8_t reset_indicator;
+extern uint8_t alarmflag;
+
+
+uint8_t max_adr=0;
+
+typedef union {
+       volatile uint8_t bytes[8];
+       struct {
+               uint16_t temp;  //0
+               uint8_t TH;  //2
+               uint8_t TL;  //3
+               uint8_t config;  //4
+               uint8_t rrFF; //5
+               uint8_t rr00; //6
+               uint8_t rr10; //7
+       };
+} pack_t;
+volatile pack_t pack;
+
+volatile uint8_t wdcounter;
+
+#if  defined(__AVR_ATtiny24__)||defined(__AVR_ATtiny44__)  || defined(__AVR_ATtiny84__) || defined(__AVR_ATtiny24A__)||defined(__AVR_ATtiny44A__)  || defined(__AVR_ATtiny84A__)
+ISR(WATCHDOG_vect) {
+#else
+ISR(WDT_vect) {
+#endif 
+       wdcounter++;
+       if (reset_indicator==1) reset_indicator++;
+       else if (reset_indicator==2) mode=0;
+}
+
+
+
+
+#define CH0_M MAX1164x_C_SCAN0|MAX1164x_C_SGL
+#define CH1_M MAX1164x_C_SCAN0|MAX1164x_C_SGL|MAX1164x_C_CS0
+#define CH0_CH1 MAX1164x_C_SCAN0
+
+
+
+int main(void){
+    PRR|=(1<<PRADC);  // adc for save Power
+       pack.temp=0x0550;
+       pack.config=0x7F;
+       pack.TH=75;
+       pack.TL=70;
+       pack.rrFF=0xFF;
+       pack.rr00=0;
+       pack.rr10=0x10;
+       PORTA=0xFF;
+       PORTB=0xFF;
+       OWINIT();
+       PORTB|=(1<<PINB1);
+       DDRB|=(1<<PINB1);
+       PORTA|=(1<<PINA0);
+       DDRA|=(1<<PINA0);
+       
+
+       MCUCR &=~(1<<PUD); //All Pins Pullup...
+       MCUCR |=(1<<BODS);
+       
+       WDTCSR |= ((1<<WDCE) );   // Enable the WD Change Bit//| (1<<WDE)
+       WDTCSR |=   (1<<WDIE) |              // Enable WDT Interrupt
+       (1<<WDP2) | (1<<WDP1)| (1<<WDP0);   // Set Timeout to ~2 seconds
+       
+
+       MCUSR=0;
+       USI_TWI_Master_Initialise();
+       MAX1164x_config(MAX1164x_S_SEL2|MAX1164x_S_SEL0,CH0_M);//#define MAX1164x_C_CS0
+       _delay_ms(30); //Internal Referenz start
+       //2970 -> 1,5V
+       
+       gcontrol=1;
+       //DDRB|=(1<<PINB1);
+       volatile double l;
+       sei();
+    while(1)   {
+               if (wdcounter>0) {
+                       PORTB&=~(1<<PINB1);
+                       _delay_us(500);
+                       l=MAX1164x_read();
+                       PORTB|=(1<<PINB1);
+                       wdcounter=0;
+               }
+       
+               if (gcontrol) {
+                       //PORTB|=(1<<PINB1); //Dauer 2.3ms
+                       //=MAX44009getlux(max_adr);             
+                       //if (l<0.030) l=0.030; //Darf nicht 0 sein. minimum -35°C Sensor minimum 0.045
+                       //double l=1000;
+                       
+                       uint16_t w=l;
+                       uint8_t t8=w>>4;
+                       uint8_t af=0;
+                       if (t8>pack.TH) af=1;
+                       if (t8<=pack.TL) af=1; 
+                       cli();
+                       pack.temp=w;
+                       //pack.temp++;
+                       alarmflag=af;
+                       sei();  
+                       EXTERN_SLEEP();         
+                       //PORTB&=~(1<<PINB1);
+               }
+
+               
+#if  defined(__AVR_ATtiny25__)||defined(__AVR_ATtiny45__)  || defined(__AVR_ATtiny85__)
+                       if (((TIMSK & (1<<TOIE0))==0)&& (mode==0))
+#endif                 
+#if  defined(__AVR_ATtiny24__)||defined(__AVR_ATtiny44__)  || defined(__AVR_ATtiny84__) ||defined(__AVR_ATtiny24A__)||defined(__AVR_ATtiny44A__)  || defined(__AVR_ATtiny84A__)
+                       if (((TIMSK0 & (1<<TOIE0))==0)&& (mode==0))
+#endif
+                         {
+
+                       MCUCR|=(1<<SE)|(1<<SM1);
+                       MCUCR&=~(1<<ISC01);
+               } else {
+                       MCUCR|=(1<<SE);
+                       MCUCR&=~(1<<SM1);
+               }
+               //MCUCR&=~(1<<ISC01);
+               asm("SLEEP");
+   }
+
+
+}
\ No newline at end of file
diff --git a/DS18B20_VOC/DS18B20_VOC.cproj b/DS18B20_VOC/DS18B20_VOC.cproj
new file mode 100644 (file)
index 0000000..290b54e
--- /dev/null
@@ -0,0 +1,157 @@
+<?xml version="1.0" encoding="utf-8"?>
+<Project DefaultTargets="Build" xmlns="http://schemas.microsoft.com/developer/msbuild/2003">
+  <PropertyGroup>
+    <SchemaVersion>2.0</SchemaVersion>
+    <ProjectVersion>7.0</ProjectVersion>
+    <ToolchainName>com.Atmel.AVRGCC8.C</ToolchainName>
+    <ProjectGuid>{7a5672fe-8226-4158-b931-e1f36b9a8858}</ProjectGuid>
+    <avrdevice>ATtiny84A</avrdevice>
+    <avrdeviceseries>none</avrdeviceseries>
+    <OutputType>Executable</OutputType>
+    <Language>C</Language>
+    <OutputFileName>$(MSBuildProjectName)</OutputFileName>
+    <OutputFileExtension>.elf</OutputFileExtension>
+    <OutputDirectory>$(MSBuildProjectDirectory)\$(Configuration)</OutputDirectory>
+    <AssemblyName>DS18B20_MAX44009</AssemblyName>
+    <Name>DS18B20_VOC</Name>
+    <RootNamespace>DS18B20_MAX44009</RootNamespace>
+    <ToolchainFlavour>Native</ToolchainFlavour>
+    <KeepTimersRunning>true</KeepTimersRunning>
+    <OverrideVtor>false</OverrideVtor>
+    <CacheFlash>true</CacheFlash>
+    <ProgFlashFromRam>true</ProgFlashFromRam>
+    <RamSnippetAddress>0x20000000</RamSnippetAddress>
+    <UncachedRange />
+    <preserveEEPROM>true</preserveEEPROM>
+    <OverrideVtorValue>exception_table</OverrideVtorValue>
+    <BootSegment>2</BootSegment>
+    <eraseonlaunchrule>1</eraseonlaunchrule>
+    <AsfFrameworkConfig>
+      <framework-data xmlns="">
+        <options />
+        <configurations />
+        <files />
+        <documentation help="" />
+        <offline-documentation help="" />
+        <dependencies>
+          <content-extension eid="atmel.asf" uuidref="Atmel.ASF" version="3.19.0" />
+        </dependencies>
+      </framework-data>
+    </AsfFrameworkConfig>
+    <avrtool>com.atmel.avrdbg.tool.atmelice</avrtool>
+    <com_atmel_avrdbg_tool_atmelice>
+      <ToolOptions>
+        <InterfaceProperties>
+        </InterfaceProperties>
+        <InterfaceName>debugWIRE</InterfaceName>
+      </ToolOptions>
+      <ToolType>com.atmel.avrdbg.tool.atmelice</ToolType>
+      <ToolNumber>J41800000789</ToolNumber>
+      <ToolName>Atmel-ICE</ToolName>
+    </com_atmel_avrdbg_tool_atmelice>
+    <avrtoolinterface>debugWIRE</avrtoolinterface>
+    <com_atmel_avrdbg_tool_simulator>
+      <ToolOptions>
+        <InterfaceProperties>
+        </InterfaceProperties>
+        <InterfaceName>
+        </InterfaceName>
+      </ToolOptions>
+      <ToolType>com.atmel.avrdbg.tool.simulator</ToolType>
+      <ToolNumber>
+      </ToolNumber>
+      <ToolName>Simulator</ToolName>
+    </com_atmel_avrdbg_tool_simulator>
+    <ExternalProgrammingToolCommand />
+    <avrtoolserialnumber>J41800000789</avrtoolserialnumber>
+    <avrdeviceexpectedsignature>0x1E930C</avrdeviceexpectedsignature>
+  </PropertyGroup>
+  <PropertyGroup Condition=" '$(Configuration)' == 'Release' ">
+    <ToolchainSettings>
+      <AvrGcc>
+        <avrgcc.common.Device>-mmcu=attiny84a -B "%24(PackRepoDir)\atmel\ATtiny_DFP\1.0.68\gcc\dev\attiny84a"</avrgcc.common.Device>
+        <avrgcc.common.outputfiles.hex>True</avrgcc.common.outputfiles.hex>
+        <avrgcc.common.outputfiles.lss>True</avrgcc.common.outputfiles.lss>
+        <avrgcc.common.outputfiles.eep>True</avrgcc.common.outputfiles.eep>
+        <avrgcc.common.outputfiles.srec>True</avrgcc.common.outputfiles.srec>
+        <avrgcc.common.outputfiles.usersignatures>False</avrgcc.common.outputfiles.usersignatures>
+        <avrgcc.compiler.general.ChangeDefaultCharTypeUnsigned>True</avrgcc.compiler.general.ChangeDefaultCharTypeUnsigned>
+        <avrgcc.compiler.general.ChangeDefaultBitFieldUnsigned>True</avrgcc.compiler.general.ChangeDefaultBitFieldUnsigned>
+        <avrgcc.compiler.symbols.DefSymbols>
+          <ListValues>
+            <Value>DEBUG</Value>
+          </ListValues>
+        </avrgcc.compiler.symbols.DefSymbols>
+        <avrgcc.compiler.directories.IncludePaths>
+          <ListValues>
+            <Value>%24(PackRepoDir)\atmel\ATtiny_DFP\1.0.68\include</Value>
+          </ListValues>
+        </avrgcc.compiler.directories.IncludePaths>
+        <avrgcc.compiler.optimization.level>Optimize (-O1)</avrgcc.compiler.optimization.level>
+        <avrgcc.compiler.optimization.PackStructureMembers>True</avrgcc.compiler.optimization.PackStructureMembers>
+        <avrgcc.compiler.optimization.AllocateBytesNeededForEnum>True</avrgcc.compiler.optimization.AllocateBytesNeededForEnum>
+        <avrgcc.compiler.optimization.DebugLevel>Default (-g2)</avrgcc.compiler.optimization.DebugLevel>
+        <avrgcc.compiler.warnings.AllWarnings>True</avrgcc.compiler.warnings.AllWarnings>
+        <avrgcc.linker.libraries.Libraries>
+          <ListValues>
+            <Value>libm</Value>
+          </ListValues>
+        </avrgcc.linker.libraries.Libraries>
+        <avrgcc.assembler.debugging.DebugLevel>Default (-Wa,-g)</avrgcc.assembler.debugging.DebugLevel>
+      </AvrGcc>
+    </ToolchainSettings>
+  </PropertyGroup>
+  <PropertyGroup Condition=" '$(Configuration)' == 'Debug' ">
+    <ToolchainSettings>
+      <AvrGcc>
+        <avrgcc.common.Device>-mmcu=attiny84a -B "%24(PackRepoDir)\atmel\ATtiny_DFP\1.0.68\gcc\dev\attiny84a"</avrgcc.common.Device>
+        <avrgcc.common.outputfiles.hex>True</avrgcc.common.outputfiles.hex>
+        <avrgcc.common.outputfiles.lss>True</avrgcc.common.outputfiles.lss>
+        <avrgcc.common.outputfiles.eep>True</avrgcc.common.outputfiles.eep>
+        <avrgcc.common.outputfiles.srec>True</avrgcc.common.outputfiles.srec>
+        <avrgcc.common.outputfiles.usersignatures>False</avrgcc.common.outputfiles.usersignatures>
+        <avrgcc.compiler.general.ChangeDefaultCharTypeUnsigned>True</avrgcc.compiler.general.ChangeDefaultCharTypeUnsigned>
+        <avrgcc.compiler.general.ChangeDefaultBitFieldUnsigned>True</avrgcc.compiler.general.ChangeDefaultBitFieldUnsigned>
+        <avrgcc.compiler.symbols.DefSymbols>
+          <ListValues>
+            <Value>DEBUG</Value>
+          </ListValues>
+        </avrgcc.compiler.symbols.DefSymbols>
+        <avrgcc.compiler.directories.IncludePaths>
+          <ListValues>
+            <Value>%24(PackRepoDir)\atmel\ATtiny_DFP\1.0.68\include</Value>
+          </ListValues>
+        </avrgcc.compiler.directories.IncludePaths>
+        <avrgcc.compiler.optimization.level>Optimize (-O1)</avrgcc.compiler.optimization.level>
+        <avrgcc.compiler.optimization.PackStructureMembers>True</avrgcc.compiler.optimization.PackStructureMembers>
+        <avrgcc.compiler.optimization.AllocateBytesNeededForEnum>True</avrgcc.compiler.optimization.AllocateBytesNeededForEnum>
+        <avrgcc.compiler.optimization.DebugLevel>Default (-g2)</avrgcc.compiler.optimization.DebugLevel>
+        <avrgcc.compiler.warnings.AllWarnings>True</avrgcc.compiler.warnings.AllWarnings>
+        <avrgcc.linker.libraries.Libraries>
+          <ListValues>
+            <Value>libm</Value>
+          </ListValues>
+        </avrgcc.linker.libraries.Libraries>
+        <avrgcc.assembler.debugging.DebugLevel>Default (-Wa,-g)</avrgcc.assembler.debugging.DebugLevel>
+      </AvrGcc>
+    </ToolchainSettings>
+  </PropertyGroup>
+  <ItemGroup>
+    <Compile Include="..\common\OWDS18B20.S">
+      <SubType>compile</SubType>
+      <Link>OWDS18B20.S</Link>
+    </Compile>
+    <Compile Include="D:\oc\dev\owSlave2\common\I2C\MAX1164x.c">
+      <SubType>compile</SubType>
+      <Link>MAX1164x.c</Link>
+    </Compile>
+    <Compile Include="D:\oc\dev\owSlave2\common\I2C\USI_TWI_Master.c">
+      <SubType>compile</SubType>
+      <Link>USI_TWI_Master.c</Link>
+    </Compile>
+    <Compile Include="DS18B20_VOC.c">
+      <SubType>compile</SubType>
+    </Compile>
+  </ItemGroup>
+  <Import Project="$(AVRSTUDIO_EXE_PATH)\\Vs\\Compiler.targets" />
+</Project>
\ No newline at end of file
diff --git a/DS18B20_VOC_DS2438_SHT/DS18B20_DS2438.c b/DS18B20_VOC_DS2438_SHT/DS18B20_DS2438.c
new file mode 100644 (file)
index 0000000..d455f89
--- /dev/null
@@ -0,0 +1,379 @@
+
+// Copyright (c) 2015, Tobias Mueller tm(at)tm3d.de
+// All rights reserved.
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are
+// met:
+//
+//  * Redistributions of source code must retain the above copyright
+//    notice, this list of conditions and the following disclaimer.
+//  * Redistributions in binary form must reproduce the above copyright
+//    notice, this list of conditions and the following disclaimer in the
+//    documentation and/or other materials provided with the
+//    distribution.
+//  * All advertising materials mentioning features or use of this
+//    software must display the following acknowledgement: This product
+//    includes software developed by tm3d.de and its contributors.
+//  * Neither the name of tm3d.de nor the names of its contributors may
+//    be used to endorse or promote products derived from this software
+//    without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+#define F_CPU 8000000UL
+#include <avr/io.h>
+#include <avr/interrupt.h>
+#include <util/delay.h>
+#include <avr/wdt.h>
+#include <avr/sleep.h>
+#include <avr/pgmspace.h>
+#include "../common/I2C/USI_TWI_Master.h"
+#include "../common/I2C/MAX1164x.h"
+#include "../common/I2C/SHT2x.h"
+#include <avr/pgmspace.h>
+
+extern void OWINIT();
+extern void EXTERN_SLEEP();
+
+
+const int16_t hl[5] PROGMEM = {0,400,650,850,1000};  //H*10
+
+//log values *1000
+const int16_t il[5][5] PROGMEM= {
+{470,  247,    140,    77,     49},
+{336,  104,    0,      -62,    -83},
+{207,  -20,    -139,   -198,   -223},
+{86,   -139,   -248,   -315,   -342},
+{-30,  -248,   -371,   -431,   -462}};
+
+
+
+
+extern void OWINIT();
+extern void EXTERN_SLEEP();
+
+
+uint8_t owid1[8]={0x28, 0xA3, 0xD9, 0x84, 0x00, 0x16, 0x05, 0x18};/**/
+uint8_t owid2[8]={0x26, 0xA3, 0xD9, 0x84, 0x00, 0x16, 0x05, 0x67};/**/
+uint8_t config_info1[16]={0x08,0x01, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00};        
+uint8_t config_info2[16]={0x01,0x06, 0x05,0x08, 0x04,0x07, 0x07,0x08, 0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00};        
+       
+#if (owid>128) 
+#error "Variable not correct"
+#endif
+
+extern uint8_t mode;
+extern uint8_t gcontrol;
+extern uint8_t reset_indicator;
+extern uint8_t alarmflag;
+volatile uint8_t wdcounter=1;
+
+
+#if  defined(__AVR_ATtiny24__)||defined(__AVR_ATtiny44__)  || defined(__AVR_ATtiny84__) || defined(__AVR_ATtiny24A__)||defined(__AVR_ATtiny44A__)  || defined(__AVR_ATtiny84A__)
+ISR(WATCHDOG_vect) {
+#else
+ISR(WDT_vect) {
+#endif 
+       wdcounter++;
+       if (reset_indicator==1) reset_indicator++;
+       else if (reset_indicator==2) mode=0;
+
+
+}
+
+
+typedef union {
+       volatile uint8_t bytes[8];
+       struct {
+               uint16_t temp;  //0
+               uint8_t TH;  //2
+               uint8_t TL;  //3
+               uint8_t config;  //4
+               uint8_t rrFF; //5
+               uint8_t rr00; //6
+               uint8_t rr10; //7
+       };
+} pack1_t;
+volatile pack1_t pack1;
+
+
+
+typedef union {
+       #if  defined(__AVR_ATtiny25__)
+       volatile uint8_t bytes[16];
+       #else
+       volatile uint8_t bytes[64];
+       #endif
+       struct {
+               uint8_t status;  //1
+               int16_t temp;  //2
+               uint16_t voltage;  //4
+               int16_t current;  //6
+               uint8_t threshold; //8
+               
+               uint8_t page1[8]; //9
+               #if  defined(__AVR_ATtiny25__)
+               #else
+               uint8_t page2[8]; //17
+               uint8_t page3[8]; //25
+               uint8_t page4[8];  //33
+               uint8_t page5[8];  //41
+               uint8_t page6[8];  //49
+               uint8_t page7[8];  //57
+               //uint8_t crc;  //65
+               #endif
+       };
+} pack2_t;
+volatile pack2_t pack2;
+
+
+
+
+volatile int16_t am2302_temp;
+volatile uint16_t am2302_hum;
+
+
+uint8_t userRegister[1];
+int16_t sRH,sT;
+volatile double temperatureC,humidityRH;
+volatile double l;
+
+uint8_t max_adr=0;
+#define CH0_M MAX1164x_C_SCAN0|MAX1164x_C_SGL
+#define CH1_M MAX1164x_C_SCAN0|MAX1164x_C_SGL|MAX1164x_C_CS0
+#define CH0_CH1 MAX1164x_C_SCAN0
+//|MAX1164x_C_CS0
+
+//T und H mit 10 multipliziert
+
+double interp(int16_t t, int16_t h) {
+double ya,yb;
+uint8_t h1,h2,t1,t2;
+int16_t x1,x2,y1_,y2;
+       h1=0;
+       h2=0;
+       for(uint8_t i=0;i<5;i++) {
+               int16_t hlw=pgm_read_word(&(hl[i]));
+               if (h>hlw) h1=i;
+       }
+       h2=h1+1;
+       if (h2>4) {h2=4;h1=3;}
+       t2=((uint8_t)t/100); //t mit 10 multipliziert
+       if (t2<1) t2=1;
+       t1=t2-1;
+       x1=pgm_read_word(&(hl[h1]));
+       x2=pgm_read_word(&(hl[h2]));
+       y1_=pgm_read_word(&(il[t1][h1]));
+       y2=pgm_read_word(&(il[t1][h2]));
+       double d=(double)(h-x1)/(x2-x1);
+       ya=y1_+(y2-y1_)*d;
+       y1_=pgm_read_word(&(il[t2][h1]));
+       y2=pgm_read_word(&(il[t2][h2]));
+       yb=y1_+(y2-y1_)*d;
+       x1=(t1+1)*100;
+       x2=x1+100;
+       return exp((ya+(yb-ya)/(double)(x2-x1)*(t-x1))/1000.0);
+       
+}
+uint8_t cmode=0;
+double R0=0;
+int16_t hr;
+uint8_t startup=5;
+
+int main(void){
+    PRR|=(1<<PRADC);  // adc for save Power
+       pack1.temp=0x0550;
+       pack1.config=0x7F;
+       pack1.TH=75;
+       pack1.TL=70;
+       pack1.rrFF=0xFF;
+       pack1.rr00=0;
+       pack1.rr10=0x10;
+       PORTA=0xFF;
+       PORTB=0xFF;
+       OWINIT();
+       PORTB|=(1<<PINB1);
+       DDRB|=(1<<PINB1);
+       PORTA|=(1<<PINA0);
+       DDRA|=(1<<PINA0);
+       
+       MCUCR &=~(1<<PUD); //All Pins Pullup...
+       MCUCR |=(1<<BODS);
+       
+       while(EECR & (1<<EEPE));
+       EEARL=1;
+       EECR |= (1<<EERE);
+       hr=EEDR;
+       if (hr!=0xFF) {
+               hr=hr<<8;
+               while(EECR & (1<<EEPE));
+               EEARL=0;
+               EECR |= (1<<EERE);
+               hr|=EEDR;
+               R0=hr/100.0;
+               pack2.page3[0]=hr&0xFF;
+               pack2.page3[1]=(hr>>8)&0xFF;
+       }
+
+       
+       /*volatile double test=interp(0,800);
+       test=interp(100,900);
+       test=interp(110,400);
+       test=interp(300,200);
+       test=interp(300,210);
+       test=interp(280,600);
+       test=interp(100,900);
+       */
+
+       WDTCSR |= ((1<<WDCE) );   // Enable the WD Change Bit//| (1<<WDE)
+       WDTCSR |=   (1<<WDIE) |              // Enable WDT Interrupt
+       (1<<WDP3) | (1<<WDP0);    // Set Timeout to ~8 seconds
+
+       MCUSR=0;
+       USI_TWI_Master_Initialise();
+       
+       SHT2x_SoftReset();
+       SHT2x_ReadUserRegister(userRegister);
+       //(userRegister & ~SHT2x_RES_MASK) | SHT2x_RES_10_13BIT;
+       SHT2x_WriteUserRegister(userRegister); //write changed user reg
+       // --- measure humidity with "Hold Master Mode (HM)" ---
+       SHT2x_MeasurePoll(HUMIDITY, &sRH);
+       // --- measure temperature with "Polling Mode" (no hold master) ---
+       SHT2x_MeasurePoll(TEMP, &sT);
+       //-- calculate humidity and temperature --
+       temperatureC = SHT2x_CalcTemperatureC(sT);
+       humidityRH = SHT2x_CalcRH(sRH);
+       MAX1164x_config(MAX1164x_S_SEL2|MAX1164x_S_SEL0,CH0_M);//#define MAX1164x_C_CS0
+       _delay_ms(30); //Internal Referenz start
+       //2970 -> 1,5V  
+       gcontrol=1;
+       sei();
+       //DDRB|=(1<<PINB1);
+    while(1)   {
+               if (wdcounter>0) {
+                       if (startup!=0) startup--;
+                       //PORTB|=(1<<PINB1); //Dauer 440ms
+                       SHT2x_MeasurePoll(HUMIDITY, &sRH);
+                       // --- measure temperature with "Polling Mode" (no hold master) ---
+                       SHT2x_MeasurePoll(TEMP, &sT);
+                       //-- calculate humidity and temperature --
+                       temperatureC = SHT2x_CalcTemperatureC(sT)*10.0;
+                       humidityRH = SHT2x_CalcRH(sRH)*10.0;
+                       double hhum=(1.0546-0.000216*temperatureC)*(humidityRH);
+                       am2302_hum=0.318*hhum +76.0;
+                       am2302_temp=temperatureC*25.6;
+                       //PORTB&=~(1<<PINB1);
+                       PORTB&=~(1<<PINB1);
+                       _delay_us(500);
+                       l=MAX1164x_read();
+                       PORTB|=(1<<PINB1);
+                       if (cmode) {
+                               l=l*2.048/4096+1.5; //Spannung real
+                       } else {
+                               l=l*2.048/4096; //Spannung real
+                       }
+                       if (l>1.8) {
+                               if (cmode==0) {
+                                       MAX1164x_config(MAX1164x_S_SEL2|MAX1164x_S_SEL0,CH0_CH1);
+                                       cmode=1;
+                                       pack2.page3[4]=cmode;
+                               }
+                       }
+                       if (l<1.6) {
+                               if (cmode==1) {
+                                       MAX1164x_config(MAX1164x_S_SEL2|MAX1164x_S_SEL0,CH0_M);
+                                       cmode=0;
+                                       pack2.page3[4]=cmode;
+                               }
+                               
+                               
+                       }
+                       hr=l*10000.0;
+                       pack2.page3[2]=hr&0xFF;
+                       pack2.page3[3]=(hr>>8)&0xFF;
+                       l=( 3/l- 1) *27;
+                       pack2.current=l*100;
+                       float ip=interp(temperatureC,humidityRH);
+                       hr=ip*1000;
+                       pack2.page3[5]=hr&0xFF;
+                       pack2.page3[6]=(hr>>8)&0xFF;
+                       
+                       l=l/ip;
+                       if (startup!=0){
+                       if (l>R0) {
+                               R0=l;
+                               hr=R0*100;
+                               pack2.page3[0]=hr&0xFF;
+                               pack2.page3[1]=(hr>>8)&0xFF;
+                               
+                               while(EECR & (1<<EEPE));
+                               EECR = (0<<EEPM1)|(0<<EEPM0);
+                               EEARL = 0;
+                               EEDR = hr&0xFF;
+                               EECR |= (1<<EEMPE);
+                               EECR |= (1<<EEPE);
+                               while(EECR & (1<<EEPE));
+                               EECR = (0<<EEPM1)|(0<<EEPM0);
+                               EEARL = 1;
+                               EEDR = hr>>8;
+                               EECR |= (1<<EEMPE);
+                               EECR |= (1<<EEPE);
+
+                       }
+                       }
+                        l=l/R0;
+                       l=log(1/l);
+                       l=l*160; //fuer DS18B20
+                       wdcounter=0;
+                       
+               }
+       
+               if (gcontrol==1) {
+                       uint16_t w=l;
+                       uint8_t t8=w>>4;
+                       uint8_t af=0;
+                       if (t8>pack1.TH) af=1;
+                       if (t8<=pack1.TL) af=1; 
+                       cli();
+                       pack1.temp=w;
+                       //pack.temp++;
+                       alarmflag=af;
+                       sei();                  
+                       EXTERN_SLEEP();         
+               }
+               if ((gcontrol==2)||(gcontrol==3)) {
+                       gcontrol=0;
+                       
+               }
+
+               
+#if  defined(__AVR_ATtiny25__)||defined(__AVR_ATtiny45__)  || defined(__AVR_ATtiny85__)
+                       if (((TIMSK & (1<<TOIE0))==0)&& (mode==0))
+#endif                 
+#if  defined(__AVR_ATtiny24__)||defined(__AVR_ATtiny44__)  || defined(__AVR_ATtiny84__) ||defined(__AVR_ATtiny24A__)||defined(__AVR_ATtiny44A__)  || defined(__AVR_ATtiny84A__)
+                       if (((TIMSK0 & (1<<TOIE0))==0)&& (mode==0))
+#endif
+                         {
+
+                       MCUCR|=(1<<SE)|(1<<SM1);
+                       MCUCR&=~(1<<ISC01);
+               } else {
+                       MCUCR|=(1<<SE);
+                       MCUCR&=~(1<<SM1);
+               }
+               asm("SLEEP");
+   }
+
+
+}
\ No newline at end of file
diff --git a/DS18B20_VOC_DS2438_SHT/DS18B20_VOC_DS2438_SHT.atsln b/DS18B20_VOC_DS2438_SHT/DS18B20_VOC_DS2438_SHT.atsln
new file mode 100644 (file)
index 0000000..7afb50c
--- /dev/null
@@ -0,0 +1,22 @@
+
+Microsoft Visual Studio Solution File, Format Version 12.00
+# Atmel Studio Solution File, Format Version 11.00
+VisualStudioVersion = 14.0.23107.0
+MinimumVisualStudioVersion = 10.0.40219.1
+Project("{54F91283-7BC4-4236-8FF9-10F437C3AD48}") = "DS18B20_VOC_DS2438_SHT", "DS18B20_VOC_DS2438_SHT.cproj", "{7A5672FE-8226-4158-B931-E1F36B9A8858}"
+EndProject
+Global
+       GlobalSection(SolutionConfigurationPlatforms) = preSolution
+               Debug|AVR = Debug|AVR
+               Release|AVR = Release|AVR
+       EndGlobalSection
+       GlobalSection(ProjectConfigurationPlatforms) = postSolution
+               {7A5672FE-8226-4158-B931-E1F36B9A8858}.Debug|AVR.ActiveCfg = Debug|AVR
+               {7A5672FE-8226-4158-B931-E1F36B9A8858}.Debug|AVR.Build.0 = Debug|AVR
+               {7A5672FE-8226-4158-B931-E1F36B9A8858}.Release|AVR.ActiveCfg = Release|AVR
+               {7A5672FE-8226-4158-B931-E1F36B9A8858}.Release|AVR.Build.0 = Release|AVR
+       EndGlobalSection
+       GlobalSection(SolutionProperties) = preSolution
+               HideSolutionNode = FALSE
+       EndGlobalSection
+EndGlobal
diff --git a/DS18B20_VOC_DS2438_SHT/DS18B20_VOC_DS2438_SHT.cproj b/DS18B20_VOC_DS2438_SHT/DS18B20_VOC_DS2438_SHT.cproj
new file mode 100644 (file)
index 0000000..cc461cb
--- /dev/null
@@ -0,0 +1,161 @@
+<?xml version="1.0" encoding="utf-8"?>
+<Project DefaultTargets="Build" xmlns="http://schemas.microsoft.com/developer/msbuild/2003">
+  <PropertyGroup>
+    <SchemaVersion>2.0</SchemaVersion>
+    <ProjectVersion>7.0</ProjectVersion>
+    <ToolchainName>com.Atmel.AVRGCC8.C</ToolchainName>
+    <ProjectGuid>{7a5672fe-8226-4158-b931-e1f36b9a8858}</ProjectGuid>
+    <avrdevice>ATtiny84A</avrdevice>
+    <avrdeviceseries>none</avrdeviceseries>
+    <OutputType>Executable</OutputType>
+    <Language>C</Language>
+    <OutputFileName>$(MSBuildProjectName)</OutputFileName>
+    <OutputFileExtension>.elf</OutputFileExtension>
+    <OutputDirectory>$(MSBuildProjectDirectory)\$(Configuration)</OutputDirectory>
+    <AssemblyName>DS18B20_DS2438</AssemblyName>
+    <Name>DS18B20_VOC_DS2438_SHT</Name>
+    <RootNamespace>DS18B20_DS2438</RootNamespace>
+    <ToolchainFlavour>Native</ToolchainFlavour>
+    <KeepTimersRunning>true</KeepTimersRunning>
+    <OverrideVtor>false</OverrideVtor>
+    <CacheFlash>true</CacheFlash>
+    <ProgFlashFromRam>true</ProgFlashFromRam>
+    <RamSnippetAddress>0x20000000</RamSnippetAddress>
+    <UncachedRange />
+    <preserveEEPROM>true</preserveEEPROM>
+    <OverrideVtorValue>exception_table</OverrideVtorValue>
+    <BootSegment>2</BootSegment>
+    <eraseonlaunchrule>1</eraseonlaunchrule>
+    <AsfFrameworkConfig>
+      <framework-data xmlns="">
+        <options />
+        <configurations />
+        <files />
+        <documentation help="" />
+        <offline-documentation help="" />
+        <dependencies>
+          <content-extension eid="atmel.asf" uuidref="Atmel.ASF" version="3.19.0" />
+        </dependencies>
+      </framework-data>
+    </AsfFrameworkConfig>
+    <avrtool>com.atmel.avrdbg.tool.atmelice</avrtool>
+    <com_atmel_avrdbg_tool_atmelice>
+      <ToolOptions>
+        <InterfaceProperties>
+        </InterfaceProperties>
+        <InterfaceName>debugWIRE</InterfaceName>
+      </ToolOptions>
+      <ToolType>com.atmel.avrdbg.tool.atmelice</ToolType>
+      <ToolNumber>J41800000789</ToolNumber>
+      <ToolName>Atmel-ICE</ToolName>
+    </com_atmel_avrdbg_tool_atmelice>
+    <avrtoolinterface>debugWIRE</avrtoolinterface>
+    <com_atmel_avrdbg_tool_simulator>
+      <ToolOptions>
+        <InterfaceProperties>
+        </InterfaceProperties>
+        <InterfaceName>
+        </InterfaceName>
+      </ToolOptions>
+      <ToolType>com.atmel.avrdbg.tool.simulator</ToolType>
+      <ToolNumber>
+      </ToolNumber>
+      <ToolName>Simulator</ToolName>
+    </com_atmel_avrdbg_tool_simulator>
+    <ExternalProgrammingToolCommand />
+    <avrtoolserialnumber>J41800000789</avrtoolserialnumber>
+    <avrdeviceexpectedsignature>0x1E930C</avrdeviceexpectedsignature>
+  </PropertyGroup>
+  <PropertyGroup Condition=" '$(Configuration)' == 'Release' ">
+    <ToolchainSettings>
+      <AvrGcc>
+        <avrgcc.common.Device>-mmcu=attiny84a -B "%24(PackRepoDir)\atmel\ATtiny_DFP\1.0.68\gcc\dev\attiny84a"</avrgcc.common.Device>
+        <avrgcc.common.outputfiles.hex>True</avrgcc.common.outputfiles.hex>
+        <avrgcc.common.outputfiles.lss>True</avrgcc.common.outputfiles.lss>
+        <avrgcc.common.outputfiles.eep>True</avrgcc.common.outputfiles.eep>
+        <avrgcc.common.outputfiles.srec>True</avrgcc.common.outputfiles.srec>
+        <avrgcc.common.outputfiles.usersignatures>False</avrgcc.common.outputfiles.usersignatures>
+        <avrgcc.compiler.general.ChangeDefaultCharTypeUnsigned>True</avrgcc.compiler.general.ChangeDefaultCharTypeUnsigned>
+        <avrgcc.compiler.general.ChangeDefaultBitFieldUnsigned>True</avrgcc.compiler.general.ChangeDefaultBitFieldUnsigned>
+        <avrgcc.compiler.symbols.DefSymbols>
+          <ListValues>
+            <Value>DEBUG</Value>
+          </ListValues>
+        </avrgcc.compiler.symbols.DefSymbols>
+        <avrgcc.compiler.directories.IncludePaths>
+          <ListValues>
+            <Value>%24(PackRepoDir)\atmel\ATtiny_DFP\1.0.68\include</Value>
+          </ListValues>
+        </avrgcc.compiler.directories.IncludePaths>
+        <avrgcc.compiler.optimization.level>Optimize (-O1)</avrgcc.compiler.optimization.level>
+        <avrgcc.compiler.optimization.PackStructureMembers>True</avrgcc.compiler.optimization.PackStructureMembers>
+        <avrgcc.compiler.optimization.AllocateBytesNeededForEnum>True</avrgcc.compiler.optimization.AllocateBytesNeededForEnum>
+        <avrgcc.compiler.optimization.DebugLevel>Default (-g2)</avrgcc.compiler.optimization.DebugLevel>
+        <avrgcc.compiler.warnings.AllWarnings>True</avrgcc.compiler.warnings.AllWarnings>
+        <avrgcc.linker.libraries.Libraries>
+          <ListValues>
+            <Value>libm</Value>
+          </ListValues>
+        </avrgcc.linker.libraries.Libraries>
+        <avrgcc.assembler.debugging.DebugLevel>Default (-Wa,-g)</avrgcc.assembler.debugging.DebugLevel>
+      </AvrGcc>
+    </ToolchainSettings>
+  </PropertyGroup>
+  <PropertyGroup Condition=" '$(Configuration)' == 'Debug' ">
+    <ToolchainSettings>
+      <AvrGcc>
+  <avrgcc.common.Device>-mmcu=attiny84a -B "%24(PackRepoDir)\atmel\ATtiny_DFP\1.0.68\gcc\dev\attiny84a"</avrgcc.common.Device>
+  <avrgcc.common.outputfiles.hex>True</avrgcc.common.outputfiles.hex>
+  <avrgcc.common.outputfiles.lss>True</avrgcc.common.outputfiles.lss>
+  <avrgcc.common.outputfiles.eep>True</avrgcc.common.outputfiles.eep>
+  <avrgcc.common.outputfiles.srec>True</avrgcc.common.outputfiles.srec>
+  <avrgcc.common.outputfiles.usersignatures>False</avrgcc.common.outputfiles.usersignatures>
+  <avrgcc.compiler.general.ChangeDefaultCharTypeUnsigned>True</avrgcc.compiler.general.ChangeDefaultCharTypeUnsigned>
+  <avrgcc.compiler.general.ChangeDefaultBitFieldUnsigned>True</avrgcc.compiler.general.ChangeDefaultBitFieldUnsigned>
+  <avrgcc.compiler.symbols.DefSymbols>
+    <ListValues>
+      <Value>DEBUG</Value>
+    </ListValues>
+  </avrgcc.compiler.symbols.DefSymbols>
+  <avrgcc.compiler.directories.IncludePaths>
+    <ListValues>
+      <Value>%24(PackRepoDir)\atmel\ATtiny_DFP\1.0.68\include</Value>
+    </ListValues>
+  </avrgcc.compiler.directories.IncludePaths>
+  <avrgcc.compiler.optimization.level>Optimize (-O1)</avrgcc.compiler.optimization.level>
+  <avrgcc.compiler.optimization.PackStructureMembers>True</avrgcc.compiler.optimization.PackStructureMembers>
+  <avrgcc.compiler.optimization.AllocateBytesNeededForEnum>True</avrgcc.compiler.optimization.AllocateBytesNeededForEnum>
+  <avrgcc.compiler.optimization.DebugLevel>Default (-g2)</avrgcc.compiler.optimization.DebugLevel>
+  <avrgcc.compiler.warnings.AllWarnings>True</avrgcc.compiler.warnings.AllWarnings>
+  <avrgcc.linker.libraries.Libraries>
+    <ListValues>
+      <Value>libm</Value>
+    </ListValues>
+  </avrgcc.linker.libraries.Libraries>
+  <avrgcc.assembler.debugging.DebugLevel>Default (-Wa,-g)</avrgcc.assembler.debugging.DebugLevel>
+</AvrGcc>
+    </ToolchainSettings>
+  </PropertyGroup>
+  <ItemGroup>
+    <Compile Include="..\common\I2C\SHT2x.c">
+      <SubType>compile</SubType>
+      <Link>SHT2x.c</Link>
+    </Compile>
+    <Compile Include="D:\oc\dev\owSlave2\common\I2C\MAX1164x.c">
+      <SubType>compile</SubType>
+      <Link>MAX1164x.c</Link>
+    </Compile>
+    <Compile Include="D:\oc\dev\owSlave2\common\I2C\USI_TWI_Master.c">
+      <SubType>compile</SubType>
+      <Link>USI_TWI_Master.c</Link>
+    </Compile>
+    <Compile Include="D:\oc\dev\owSlave2\common\OWDS18B20_DS2438.S">
+      <SubType>compile</SubType>
+      <Link>OWDS18B20_DS2438.S</Link>
+    </Compile>
+    <Compile Include="DS18B20_DS2438.c">
+      <SubType>compile</SubType>
+    </Compile>
+  </ItemGroup>
+  <Import Project="$(AVRSTUDIO_EXE_PATH)\\Vs\\Compiler.targets" />
+</Project>
\ No newline at end of file
diff --git a/DS18B20_VOC_DS2438_SHT/MAX1164x.h b/DS18B20_VOC_DS2438_SHT/MAX1164x.h
new file mode 100644 (file)
index 0000000..cf8977c
--- /dev/null
@@ -0,0 +1,22 @@
+#ifndef MAX1164x_H
+#define MAX1164x_H
+#define MAX1164x_S_SEL2 0x40
+#define MAX1164x_S_SEL1 0x20
+#define MAX1164x_S_SEL0 0x10
+#define MAX1164x_S_ECLK 0x08
+#define MAX1164x_S_BIP 0x04
+#define MAX1164_S_RESET 0x02
+
+#define MAX1164x_C_SCAN1 0x40
+#define MAX1164x_C_SCAN0 0x20
+#define MAX1164x_C_CS0  0x02
+#define MAX1164x_C_SGL 0x01
+
+
+
+void MAX1164x_init();
+void MAX1164x_config(uint8_t setup,uint8_t config);
+int16_t MAX1164x_read();
+
+
+#endif
\ No newline at end of file
diff --git a/common/I2C/MAX1164x.c b/common/I2C/MAX1164x.c
new file mode 100644 (file)
index 0000000..8160ac2
--- /dev/null
@@ -0,0 +1,55 @@
+#define F_CPU 8000000UL
+#include <avr/io.h>
+#include <avr/interrupt.h>
+#include <util/delay.h>
+#include <avr/wdt.h>
+#include <avr/sleep.h>
+#include "USI_TWI_Master.h"
+#include "MAX1164x.h"
+
+void MAX1164x_init(){
+       
+       
+}
+void MAX1164x_config(uint8_t setup,uint8_t config){
+       I2c_StartCondition();
+       I2c_WriteByte (0b01101100);
+       I2c_WriteByte (setup|0x80);
+       I2c_WriteByte (config);
+       I2c_StopCondition();
+       
+}
+int16_t MAX1164x_read() {
+       uint16_t res;
+       I2c_StartCondition();
+       I2c_WriteByte (0b01101101);
+       //DDR_USI&=~(1<<PIN_USI_SCL);
+       //while ((PIN_USI&(1<<PIN_USI_SCL))==0);
+       //DDR_USI|=(1<<PIN_USI_SCL);
+       _delay_us(80);
+       res=((int16_t)(I2c_ReadByte(ACK)&0x0F))<<8;
+       res|=I2c_ReadByte(NO_ACK);
+       
+       
+       I2c_StopCondition();
+       return res;
+       
+}
+
+
+int16_t MAX1164x_read8() {
+       uint16_t res;
+       I2c_StartCondition();
+       I2c_WriteByte (0b01101101);
+       //DDR_USI&=~(1<<PIN_USI_SCL);
+       //while ((PIN_USI&(1<<PIN_USI_SCL))==0);
+       //DDR_USI|=(1<<PIN_USI_SCL);
+       _delay_us(80);
+       res=((int16_t)(I2c_ReadByte(ACK)&0x0F))<<8;
+       res|=I2c_ReadByte(NO_ACK);
+       
+       
+       I2c_StopCondition();
+       return res;
+       
+}
diff --git a/common/I2C/MAX1164x.h.c b/common/I2C/MAX1164x.h.c
deleted file mode 100644 (file)
index 8160ac2..0000000
+++ /dev/null
@@ -1,55 +0,0 @@
-#define F_CPU 8000000UL
-#include <avr/io.h>
-#include <avr/interrupt.h>
-#include <util/delay.h>
-#include <avr/wdt.h>
-#include <avr/sleep.h>
-#include "USI_TWI_Master.h"
-#include "MAX1164x.h"
-
-void MAX1164x_init(){
-       
-       
-}
-void MAX1164x_config(uint8_t setup,uint8_t config){
-       I2c_StartCondition();
-       I2c_WriteByte (0b01101100);
-       I2c_WriteByte (setup|0x80);
-       I2c_WriteByte (config);
-       I2c_StopCondition();
-       
-}
-int16_t MAX1164x_read() {
-       uint16_t res;
-       I2c_StartCondition();
-       I2c_WriteByte (0b01101101);
-       //DDR_USI&=~(1<<PIN_USI_SCL);
-       //while ((PIN_USI&(1<<PIN_USI_SCL))==0);
-       //DDR_USI|=(1<<PIN_USI_SCL);
-       _delay_us(80);
-       res=((int16_t)(I2c_ReadByte(ACK)&0x0F))<<8;
-       res|=I2c_ReadByte(NO_ACK);
-       
-       
-       I2c_StopCondition();
-       return res;
-       
-}
-
-
-int16_t MAX1164x_read8() {
-       uint16_t res;
-       I2c_StartCondition();
-       I2c_WriteByte (0b01101101);
-       //DDR_USI&=~(1<<PIN_USI_SCL);
-       //while ((PIN_USI&(1<<PIN_USI_SCL))==0);
-       //DDR_USI|=(1<<PIN_USI_SCL);
-       _delay_us(80);
-       res=((int16_t)(I2c_ReadByte(ACK)&0x0F))<<8;
-       res|=I2c_ReadByte(NO_ACK);
-       
-       
-       I2c_StopCondition();
-       return res;
-       
-}
diff --git a/common/OWDS18B20.S b/common/OWDS18B20.S
new file mode 100644 (file)
index 0000000..07e4980
--- /dev/null
@@ -0,0 +1,217 @@
+
+// Copyright (c) 2015, Tobias Mueller tm(at)tm3d.de
+// All rights reserved. 
+// 
+// Redistribution and use in source and binary forms, with or without 
+// modification, are permitted provided that the following conditions are 
+// met: 
+// 
+//  * Redistributions of source code must retain the above copyright 
+//    notice, this list of conditions and the following disclaimer. 
+//  * Redistributions in binary form must reproduce the above copyright 
+//    notice, this list of conditions and the following disclaimer in the 
+//    documentation and/or other materials provided with the 
+//    distribution. 
+//  * All advertising materials mentioning features or use of this 
+//    software must display the following acknowledgement: This product 
+//    includes software developed by tm3d.de and its contributors. 
+//  * Neither the name of tm3d.de nor the names of its contributors may 
+//    be used to endorse or promote products derived from this software 
+//    without specific prior written permission. 
+// 
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 
+// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 
+// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 
+// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 
+// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 
+
+#define _CHANGEABLE_ID_
+#define _ZERO_POLLING_
+
+#include "../common/OWConfig.s"
+#include "../common/OWCRC8.s"
+
+.extern pack,8
+
+//.extern  am2302_temp,2
+
+
+
+.macro CHIP_INIT       
+Init_EEPROM_read:
+       sbic _SFR_IO_ADDR(EECR), EEPE
+       rjmp Init_EEPROM_read
+       ldi r_temp,0
+       out _SFR_IO_ADDR(EEARH), r_temp
+       ldi r_temp,2
+       out _SFR_IO_ADDR(EEARL), r_temp
+       sbi _SFR_IO_ADDR(EECR), EERE
+       in r_temp,_SFR_IO_ADDR(EEDR)
+       sbrs r_temp,7
+       rcall hrc_recall_eeprom_func
+.endm
+
+.macro COMMAND_TABLE
+               rjmp h_readscratchpad
+               rjmp h_writescratchpad
+               rjmp h_convert_run
+.endm
+
+#include "../common/OWRomFunctions.s"
+#include "../common/OWTimerInterrupt.s"
+
+
+
+; Ab hier Geraeteabhaenging
+#define OW_READ_SCRATCHPAD OW_FIRST_COMMAND+0
+#define OW_WRITE_SCRATCHPAD OW_FIRST_COMMAND+1
+#define OW_CONVERT_RUN  OW_FIRST_COMMAND+2
+
+
+;---------------------------------------------------
+;      READ COMMAND and start operation
+;---------------------------------------------------
+
+
+h_readcommand:
+       clr r_bytep
+#ifndef _DIS_FLASH_
+       FLASH_COMMANDS ; muss zu erst sein....
+#endif
+       cjmp 0xBE,hrc_set_readscratchpad
+       cjmp 0x4E,hrc_set_writescratchpad
+       cjmp 0x44,hrc_set_convertT
+       cjmp 0x48,hrc_copy_scratchpad
+       cjmp 0xB8,hrc_recall_eeprom
+       FW_CONFIG_INFO
+#ifdef _CHANGEABLE_ID_
+       CHANGE_ID_COMMANDS
+#endif
+       //ldi r_mode,OW_SLEEP
+       rjmp handle_end_sleep
+
+hrc_set_readscratchpad:
+       ldi r_mode,OW_READ_SCRATCHPAD
+       ldi r_sendflag,1
+       CRCInit2
+       rjmp h_readscratchpad
+
+hrc_set_writescratchpad:
+       ldi r_mode,OW_WRITE_SCRATCHPAD
+       ldi r_bytep,2 ;start to write in 2
+       rjmp handle_end
+
+hrc_recall_eeprom:
+       rcall hrc_recall_eeprom_func
+       rjmp handle_end
+
+
+
+hrc_set_convertT:
+       ldi r_temp,1
+       sts gcontrol,r_temp
+       ldi r_mode,OW_CONVERT_RUN
+       ldi r_sendflag,3 ;set bit 0 and 1 for no zero polling
+h_convert_run:
+       ldi r_bcount,0
+       ldi r_rwbyte,0
+       rjmp handle_end_no_bcount       
+
+hrc_copy_scratchpad:
+       ldi r_bytep,2
+       configZ pack,r_bytep
+       clr r_bytep
+hrc_copy_scratchpad_EEPROM_write:
+       sbic _SFR_IO_ADDR(EECR), EEPE   
+       rjmp hrc_copy_scratchpad_EEPROM_write
+       ldi r_temp, (0<<EEPM1)|(0<<EEPM0)
+       out _SFR_IO_ADDR(EECR), r_temp
+       ldi r_temp,0
+       out _SFR_IO_ADDR(EEARH),r_temp
+       out _SFR_IO_ADDR(EEARL), r_bytep
+       ld  r_rwbyte,Z+
+       out _SFR_IO_ADDR(EEDR), r_rwbyte
+       sbi _SFR_IO_ADDR(EECR), EEMPE
+       sbi _SFR_IO_ADDR(EECR), EEPE
+       inc r_bytep
+       cpi r_bytep,3
+       brne hrc_copy_scratchpad_EEPROM_write
+       rjmp handle_end
+
+
+hrc_recall_eeprom_func:
+       ldi r_bytep,2
+       configZ pack,r_bytep
+       clr r_bytep
+       clr r_temp
+hrc_recall_eeprom_EEPROM_read:
+       sbic _SFR_IO_ADDR(EECR), EEPE
+       rjmp hrc_recall_eeprom_EEPROM_read
+       out _SFR_IO_ADDR(EEARH), r_temp
+       out _SFR_IO_ADDR(EEARL), r_bytep
+       sbi _SFR_IO_ADDR(EECR), EERE
+       in r_rwbyte,_SFR_IO_ADDR(EEDR)
+       st Z+,r_rwbyte
+       inc r_bytep
+       cpi r_bytep,3
+       brne hrc_recall_eeprom_EEPROM_read
+       ret
+
+
+
+
+
+
+;---------------------------------------------------
+;   READ SCRATCHPAD
+;---------------------------------------------------
+
+h_readscratchpad:
+       cpi  r_bytep,8
+       breq h_readscratchpad_crc
+       cpi  r_bytep,9
+       breq h_readscratchpad_all
+       configZ pack,r_bytep
+       ld   r_rwbyte,Z
+       rjmp h_readscratchpad_endc
+h_readscratchpad_crc:
+       lds  r_rwbyte,crc
+h_readscratchpad_endc:
+       inc  r_bytep
+       ldi  r_bcount,1 
+       rjmp handle_end
+h_readscratchpad_all:
+       rjmp handle_end_sleep
+
+
+
+
+
+;---------------------------------------------------
+;   WRITE SCRATCHPAD
+;---------------------------------------------------
+
+h_writescratchpad:
+       configZ pack,r_bytep
+       inc  r_bytep
+       cpi  r_bytep,5
+       breq h_writescratchpad_all
+       st   Z,r_rwbyte
+       rjmp handle_end
+h_writescratchpad_all:
+       ori r_rwbyte,0x1F ; Alle unteren Bits sind immer 1
+       st   Z,r_rwbyte
+       rjmp handle_end_sleep
+
+
+
+
+
+#include "../common/OWPinInterrupt.s"
+.end
\ No newline at end of file
diff --git a/common/OWDS18B20_DS2438.S b/common/OWDS18B20_DS2438.S
new file mode 100644 (file)
index 0000000..a653b5c
--- /dev/null
@@ -0,0 +1,354 @@
+
+// Copyright (c) 2015, Tobias Mueller tm(at)tm3d.de
+// All rights reserved. 
+// 
+// Redistribution and use in source and binary forms, with or without 
+// modification, are permitted provided that the following conditions are 
+// met: 
+// 
+//  * Redistributions of source code must retain the above copyright 
+//    notice, this list of conditions and the following disclaimer. 
+//  * Redistributions in binary form must reproduce the above copyright 
+//    notice, this list of conditions and the following disclaimer in the 
+//    documentation and/or other materials provided with the 
+//    distribution. 
+//  * All advertising materials mentioning features or use of this 
+//    software must display the following acknowledgement: This product 
+//    includes software developed by tm3d.de and its contributors. 
+//  * Neither the name of tm3d.de nor the names of its contributors may 
+//    be used to endorse or promote products derived from this software 
+//    without specific prior written permission. 
+// 
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 
+// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 
+// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 
+// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 
+// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 
+
+#define _CHANGEABLE_ID_
+#define _ZERO_POLLING_
+//#define _DB_
+
+#include "../common/OWConfig.s"
+#include "../common/OWCRC8.s"
+
+.extern pack1,8
+
+//.extern  am2302_temp,2
+
+#if  defined(__AVR_ATtiny25__)
+.extern pack2,16
+#else
+.extern pack2,64
+#endif
+.extern  am2302_temp,2
+.extern  am2302_hum,2
+.comm block,1 ; Block der augegeben, geschrieben wird (Parameter von READ/WRITE Scratchpad)
+
+
+.macro CHIP_INIT       
+Init_EEPROM_read:
+       sbic _SFR_IO_ADDR(EECR), EEPE
+       rjmp Init_EEPROM_read
+       ldi r_temp,0
+       out _SFR_IO_ADDR(EEARH), r_temp
+       ldi r_temp,2
+       out _SFR_IO_ADDR(EEARL), r_temp
+       sbi _SFR_IO_ADDR(EECR), EERE
+       in r_temp,_SFR_IO_ADDR(EEDR)
+       sbrs r_temp,7
+       rcall hrc_recall_eeprom_func1
+.endm
+
+.macro COMMAND_TABLE
+               rjmp h_readscratchpad1
+               rjmp h_writescratchpad1
+               rjmp h_convert_run1
+               rjmp h_readscratchpad_adr2
+               rjmp h_readscratchpad2
+               rjmp h_writescratchpad_adr2
+               rjmp h_writescratchpad2
+.endm
+
+#include "../common/OWRomFunctionsDual.s"
+#include "../common/OWTimerInterrupt.s"
+
+
+
+; Ab hier Geraeteabhaenging
+#define OW_READ_SCRATCHPAD1 OW_FIRST_COMMAND+0
+#define OW_WRITE_SCRATCHPAD1 OW_FIRST_COMMAND+1
+#define OW_CONVERT_RUN1  OW_FIRST_COMMAND+2
+#define OW_READ_SCRATCHPAD_ADR2 OW_FIRST_COMMAND+3
+#define OW_READ_SCRATCHPAD2 OW_FIRST_COMMAND+4
+#define OW_WRITE_SCRATCHPAD_ADR2 OW_FIRST_COMMAND+5
+#define OW_WRITE_SCRATCHPAD2 OW_FIRST_COMMAND+6
+
+
+;---------------------------------------------------
+;      READ COMMAND and start operation
+;---------------------------------------------------
+
+
+h_readcommand1:
+       clr r_bytep
+#ifndef _DIS_FLASH_
+       FLASH_COMMANDS ; muss zu erst sein....
+#endif
+       cjmp 0xBE,hrc_set_readscratchpad1
+       cjmp 0x4E,hrc_set_writescratchpad1
+       cjmp 0x44,hrc_set_convertT1
+       cjmp 0x48,hrc_copy_scratchpad1
+       cjmp 0xB8,hrc_recall_eeprom1
+       FW_CONFIG_INFO1
+#ifdef _CHANGEABLE_ID_
+       CHANGE_ID_COMMANDS
+#endif
+       ldi r_mode,OW_SLEEP
+       rjmp handle_end
+
+hrc_set_readscratchpad1:
+       ldi r_mode,OW_READ_SCRATCHPAD1
+       ldi r_sendflag,1
+       CRCInit2
+       rjmp h_readscratchpad1
+
+hrc_set_writescratchpad1:
+       ldi r_mode,OW_WRITE_SCRATCHPAD1
+       ldi r_bytep,2 ;start to write in 2
+       rjmp handle_end
+
+hrc_recall_eeprom1:
+       rcall hrc_recall_eeprom_func1
+       rjmp handle_end
+
+
+
+hrc_set_convertT1:
+       ldi r_temp,1
+       sts gcontrol,r_temp
+
+       ldi r_mode,OW_CONVERT_RUN1
+       ldi r_sendflag,3 ;set bit 0 and 1 for no zero polling
+h_convert_run1:
+       ldi r_bcount,0
+       ldi r_rwbyte,0
+       rjmp handle_end_no_bcount       
+
+
+hrc_copy_scratchpad1:
+       ldi r_bytep,2
+       configZ pack1,r_bytep
+       clr r_bytep
+hrc_copy_scratchpad_EEPROM_write1:
+       sbic _SFR_IO_ADDR(EECR), EEPE   
+       rjmp hrc_copy_scratchpad_EEPROM_write1
+       ldi r_temp, (0<<EEPM1)|(0<<EEPM0)
+       out _SFR_IO_ADDR(EECR), r_temp
+       ldi r_temp,0
+       out _SFR_IO_ADDR(EEARH),r_temp
+       out _SFR_IO_ADDR(EEARL), r_bytep
+       ld  r_rwbyte,Z+
+       out _SFR_IO_ADDR(EEDR), r_rwbyte
+       sbi _SFR_IO_ADDR(EECR), EEMPE
+       sbi _SFR_IO_ADDR(EECR), EEPE
+       inc r_bytep
+       cpi r_bytep,3
+       brne hrc_copy_scratchpad_EEPROM_write1
+       rjmp handle_end
+
+
+hrc_recall_eeprom_func1:
+       ldi r_bytep,2
+       configZ pack1,r_bytep
+       clr r_bytep
+       clr r_temp
+hrc_recall_eeprom_EEPROM_read1:
+       sbic _SFR_IO_ADDR(EECR), EEPE
+       rjmp hrc_recall_eeprom_EEPROM_read1
+       out _SFR_IO_ADDR(EEARH), r_temp
+       out _SFR_IO_ADDR(EEARL), r_bytep
+       sbi _SFR_IO_ADDR(EECR), EERE
+       in r_rwbyte,_SFR_IO_ADDR(EEDR)
+       st Z+,r_rwbyte
+       inc r_bytep
+       cpi r_bytep,3
+       brne hrc_recall_eeprom_EEPROM_read1
+       ret
+
+
+
+
+
+
+;---------------------------------------------------
+;   READ SCRATCHPAD
+;---------------------------------------------------
+
+h_readscratchpad1:
+       cpi  r_bytep,8
+       breq h_readscratchpad_crc1
+       cpi  r_bytep,9
+       breq h_readscratchpad_all1
+       configZ pack1,r_bytep
+       ld   r_rwbyte,Z
+       rjmp h_readscratchpad_endc1
+h_readscratchpad_crc1:
+       lds  r_rwbyte,crc
+h_readscratchpad_endc1:
+       inc  r_bytep
+       ldi  r_bcount,1 
+       rjmp handle_end
+h_readscratchpad_all1:
+       rjmp handle_end_sleep
+
+
+
+
+
+;---------------------------------------------------
+;   WRITE SCRATCHPAD
+;---------------------------------------------------
+
+h_writescratchpad1:
+       configZ pack1,r_bytep
+       inc  r_bytep
+       cpi  r_bytep,5
+       breq h_writescratchpad_all1
+       st   Z,r_rwbyte
+       rjmp handle_end
+h_writescratchpad_all1:
+       ori r_rwbyte,0x1F ; Alle unteren Bits sind immer 1
+       st   Z,r_rwbyte
+       rjmp handle_end_sleep
+
+;*****************************************************************************************************************************************************************************************
+;*****************************************************************************************************************************************************************************************
+;*****************************************************************************************************************************************************************************************
+;*****************************************************************************************************************************************************************************************
+;*****************************************************************************************************************************************************************************************
+
+
+
+
+
+h_readcommand2:
+       clr r_bytep
+#ifndef _DIS_FLASH_
+       FLASH_COMMANDS ; muss zu erst sein....
+#endif
+       cset 0xBE,OW_READ_SCRATCHPAD_ADR2
+       cset 0x4E,OW_WRITE_SCRATCHPAD_ADR2
+       cjmp 0x44,hrc_set_convertT2
+       cjmp 0xB4,hrc_set_convertV2
+       FW_CONFIG_INFO2
+#ifdef _CHANGEABLE_ID_
+       CHANGE_ID_COMMANDS
+#endif
+       rjmp handle_end_sleep
+
+
+hrc_set_convertT2:
+       ldi r_temp,2
+       sts gcontrol,r_temp
+       lds r_temp,am2302_temp
+       sts pack2+1,r_temp
+       lds r_temp,am2302_temp+1
+       sts pack2+2,r_temp
+       rjmp handle_end_sleep
+hrc_set_convertV2:
+       lds r_temp,pack2
+       sbrs r_temp,3
+       rjmp hrc_set_convertVV2
+       ldi r_temp,0xF4
+       sts pack2+3,r_temp
+       ldi r_temp,0x01
+       sts pack2+4,r_temp
+       rjmp hrc_set_convertend2
+hrc_set_convertVV2:
+       ldi r_temp,3
+       sts gcontrol,r_temp
+       lds r_temp,am2302_hum
+       sts pack2+3,r_temp
+       lds r_temp,am2302_hum+1
+       sts pack2+4,r_temp
+hrc_set_convertend2:
+       rjmp handle_end_sleep
+
+
+
+;---------------------------------------------------
+;   READ SCRATCHPAD
+;---------------------------------------------------
+
+h_readscratchpad_adr2:
+       lsl r_rwbyte
+       lsl r_rwbyte
+       lsl r_rwbyte
+#if  defined(__AVR_ATtiny25__)
+       andi r_rwbyte,0x01 ;nur Page 0 und 1 und das immer wiederholen
+#endif
+       sts block,r_rwbyte
+       ldi r_sendflag,1
+       ldi r_mode,OW_READ_SCRATCHPAD2
+       CRCInit2
+h_readscratchpad2:
+       cpi  r_bytep,8
+       breq h_readscratchpad_crc2
+       cpi  r_bytep,9
+       breq h_readscratchpad_all2
+       lds  r_temp,block
+       add  r_temp,r_bytep
+       configZ pack2,r_temp
+       ld   r_rwbyte,Z
+       rjmp handle_end_inc
+h_readscratchpad_crc2:
+       lds  r_rwbyte,crc
+       rjmp handle_end_inc
+h_readscratchpad_all2:
+       rjmp handle_end_sleep
+
+
+
+
+;---------------------------------------------------
+;   WRITE SCRATCHPAD
+;---------------------------------------------------
+h_writescratchpad_adr2:
+       lsl r_rwbyte
+       lsl r_rwbyte
+       lsl r_rwbyte
+#if  defined(__AVR_ATtiny25__)
+       andi r_rwbyte,0x01 ;nur Page 0 und 1 und das immer wiederholen
+#endif
+       sts block,r_rwbyte
+       ldi r_mode,OW_WRITE_SCRATCHPAD2
+       ldi  r_bcount,1 
+       rjmp handle_end 
+h_writescratchpad2:
+       cpi  r_bytep,8
+       breq h_writescratchpad_all2
+       lds  r_temp,block
+       add  r_temp,r_bytep
+       configZ pack2,r_temp
+       st   Z,r_rwbyte
+       rjmp handle_end_inc
+h_writescratchpad_all2:
+       rjmp handle_end_sleep
+
+
+
+
+
+
+
+
+
+#include "../common/OWPinInterrupt.s"
+.end
\ No newline at end of file
index 3bf5f2d..d047da0 100644 (file)
@@ -118,7 +118,7 @@ pro_loop:
                sbrs writelow,0         ;test of zero send
                rjmp pro_loop1          ;no ? goes next
                sbi OW_DDR,OW_PIN       ;yes pull line to low
-               ldi param,50            ;wait for 50 us
+               ldi param,45            ;wait for 50 us
                rcall wait_time
                clr writelow            ;reset write low indecator
                cbi OW_DDR,OW_PIN   ;release line
index 8a2ba95..c2a53d0 100644 (file)
         <InterfaceName>debugWIRE</InterfaceName>
       </ToolOptions>
       <ToolType>com.atmel.avrdbg.tool.atmelice</ToolType>
-      <ToolNumber>J41800000789</ToolNumber>
+      <ToolNumber>J41800000779</ToolNumber>
       <ToolName>Atmel-ICE</ToolName>
     </com_atmel_avrdbg_tool_atmelice>
     <avrtoolinterface>debugWIRE</avrtoolinterface>
     <ExternalProgrammingToolCommand />
+    <avrtoolserialnumber>J41800000779</avrtoolserialnumber>
+    <avrdeviceexpectedsignature>0x1E930C</avrdeviceexpectedsignature>
   </PropertyGroup>
   <PropertyGroup Condition=" '$(Configuration)' == 'Debug' ">
     <ToolchainSettings>
diff --git a/programmer/programmer/programmer_4mhz.asm b/programmer/programmer/programmer_4mhz.asm
new file mode 100644 (file)
index 0000000..9af0938
--- /dev/null
@@ -0,0 +1,490 @@
+.def srbyte = r12  ;byty for search rom algorithm
+.def writelow = r13;  marker for send low
+.def zero =r14;  always zero 
+.def smode=r15; if 1 then send 
+.def temp = r16 ; 
+.def temp2 = r17; 
+.def mode = r18 ; 
+.def bitp = r19 ; bit counter ... shift...
+.def rwbyte = r21;
+.def param = r22;
+.def bytep = r23  ;byte counter
+#define spmcrval  param
+
+
+.equ OWM_READ_ROM_COMMAND=0 ; 0 wegen schnellen test ist dieser wert 0! Daturch wird die Sprungdabelle nicht verwendet
+.equ OWM_SLEEP=1 ; Warten auf Reset
+.equ OWM_MATCH_ROM=2
+.equ OWM_SEARCH_ROM_S=3  ;send bit
+.equ OWM_SEARCH_ROM_R=4  ;resive master
+.equ OWM_READ_COMMAND=5
+.equ OWM_WRITE_SCRATCHPAD=6
+.equ OWM_READ_SCRATCHPAD=7
+.equ OWM_PROGRAMM_PAGE=8
+.equ OWM_RECALL_FLASH=9
+
+
+.equ OW_DDR = DDRB 
+.equ OW_PIN = PORTB2
+.equ OW_PORT = PORTB 
+.equ OW_PINN = PINB 
+
+;.equ SRAM_START = 0x60
+
+.macro set_clock
+               ldi temp,0x80;
+               out CLKPR,temp
+               ldi temp,@0
+               out CLKPR,temp
+.endmacro 
+
+.macro owwl
+               sbic OW_PINN,OW_PIN
+               rjmp pc-1
+.endmacro 
+
+.macro owwh
+               sbis OW_PINN,OW_PIN
+               rjmp pc-1
+.endmacro 
+
+
+
+
+ ;---------------------------------------------------
+; START of PROG 
+;---------------------------------------------------
+
+
+.CSEG 
+.ORG 0x000
+jreset:
+               rjmp start ; Reset-Vector 
+               reti ; 
+               reti ; 
+               reti ; 
+               reti ; 
+               reti ; 
+               reti ; 
+               reti ; 
+               reti ; 
+               reti ; 
+               reti ; 
+               reti ; 
+               reti ; 
+               reti ; 
+               reti ; 
+               reti ; 
+               reti ; 
+               reti ; 
+               reti ; 
+               reti ; 
+               reti ; 
+
+
+.ORG 0x0EC0
+
+start: 
+               cli
+               ldi temp,0
+               mov zero,temp
+               set_clock 0x01 ;4mhz
+               ldi mode,OWM_SLEEP
+               ldi temp,(1<<CS01) //2us
+               out TCCR0B,temp
+               ldi temp, HIGH(RAMEND) ; HIGH-Byte der obersten RAM-Adresse 
+               out SPH, temp 
+               ldi temp, LOW(RAMEND) ; LOW-Byte der obersten RAM-Adresse 
+               out SPL, temp 
+               ;ldi temp,1
+               ;out DDRB,temp
+               clr writelow
+               clr bitp
+       
+               ;sbi PORTB,0
+               ldi ZL,low(pro_owid*2) 
+               ldi ZH,high(pro_owid*2) 
+               ldi XL,low(sowid)
+               ldi XH,high(sowid)
+               ;ldi temp2,8
+pro_copy_loop: ;copy ID on SRAM for better handling
+               lpm temp,Z+
+               st X+,temp
+               cpi XL,SRAM_START+8
+               brlo pro_copy_loop
+pro_loop:
+               ;sbi PORTB,0
+               owwl                            ;wait for line goes low (polling)
+               sbrc writelow,0         ;test of zero send
+               sbi OW_DDR,OW_PIN       ;yes pull line to low 2us faster
+               sbrs writelow,0     ;test egain 2us faster.....
+               rjmp pro_loop1          ;no ? goes next
+               ldi param,20            ;wait for 50 us
+               rcall wait_time
+               clr writelow            ;reset write low indecator
+               cbi OW_DDR,OW_PIN   ;release line
+               owwh                            ;wait for line is high (it can takes some time cause of the capacity of line)
+pro_loop1:
+               tst smode                       ;smode=1 for slave sends to master
+               breq pro_loop_resv
+pro_loop_send:
+               tst bitp
+               brne pro_loop_send1
+               rcall pro_hb
+               tst smode
+               breq pro_loop_end ; now reading ... do nothing 
+pro_loop_send1:  ;prebare next bit
+               sbrs rwbyte ,0; if bit 0 set in rwbyte then skip next command
+               inc writelow
+               lsl bitp
+               ror rwbyte
+               rjmp pro_loop_end
+
+pro_loop_resv:
+               ldi param,7  ;wait 15us
+               rcall wait_time
+               lsr rwbyte
+               ;cbi PORTB,0
+               sbic OW_PINN,OW_PIN  ;test line
+               ori rwbyte,0x80
+               lsl bitp
+               brne pro_loop_end ;no handle need
+               rcall pro_hb
+               tst smode
+               brne pro_loop_send ; Nach dem Gelesen byte koennte gesendet werden muessen....
+pro_loop_end:
+               //owwh
+               out TCNT0,zero
+pro_loop_end_test_reset:
+               sbic OW_PINN,OW_PIN  //leitung wieder high
+               rjmp pro_loop
+               in temp,TCNT0
+               cpi temp,63
+               brlo pro_loop_end_test_reset
+               rcall pro_sleep_s2
+               rjmp pro_loop
+
+
+
+
+pro_sleep:
+               out TCNT0,zero
+pro_sleep_s1:
+               sbic OW_PINN,OW_PIN  //leitung wieder high
+               ret
+               in temp,TCNT0
+               cpi temp,100
+               brlo pro_sleep_s1
+               //leitung wieder high
+pro_sleep_s2:
+               owwh 
+               ldi param,20
+               rcall wait_time
+               //Presents Impuls
+               sbi OW_DDR,OW_PIN
+               ldi param,75
+               rcall wait_time
+               cbi OW_DDR,OW_PIN
+               //init read byte
+               ldi bitp,0x01
+               ldi rwbyte,0
+               clr smode
+               ldi mode,OWM_READ_ROM_COMMAND
+               //Wait for all other devices presents impuls finished
+               ldi param,20
+               rcall wait_time
+               ret
+
+
+
+pro_hb:
+               ldi ZL,low(pro_stable) 
+               ldi ZH,high(pro_stable) 
+               add ZL,mode 
+               adc ZH,zero
+               icall
+               ret
+
+pro_stable: 
+               rjmp pro_read_rom_command
+               rjmp pro_sleep 
+               rjmp pro_match_rom
+               rjmp pro_search_rom_s
+               rjmp pro_search_rom_r
+               rjmp pro_read_command
+               rjmp pro_write_scratchpad
+               rjmp pro_read_scratchpad
+               rjmp pro_programm_page
+               rjmp pro_recall_flash
+
+pro_read_rom_command:
+               ldi mode,OWM_SLEEP
+               cpi rwbyte,0xCC
+               brne pro_rcc_1
+               ldi mode,OWM_READ_COMMAND
+               rjmp pro_out_bitp1
+pro_rcc_1:
+               cpi rwbyte,0xF0 ;Searchrom
+               brne pro_rcc_2
+               ldi XL,low(sowid)  ;init sram pointer
+               ldi XH,high(sowid)
+               ld srbyte,X+
+               ldi bytep,0
+               rjmp pro_serchrom_next_bit
+pro_rcc_2:
+               cpi rwbyte,0x55 ;Matchrom
+               brne pro_rcc_3
+//             rcall pro_owidinit
+               ldi XL,low(sowid)  ;init sram pointer
+               ldi XH,high(sowid)
+               ldi mode,OWM_MATCH_ROM
+               rjmp pro_out_bytep0
+
+pro_rcc_3:
+               ret
+
+pro_match_rom:         
+               ld temp,X+
+               cp temp,rwbyte
+               breq pro_match_rom_next
+               ldi mode,OWM_SLEEP
+               ret
+pro_match_rom_next:                                    
+               cpi XL,SRAM_START+8
+               breq pro_match_rom_found
+               rjmp pro_out_bitp1
+pro_match_rom_found:
+           ldi mode,OWM_READ_COMMAND
+               rjmp pro_out_bitp1
+
+pro_read_command:
+               ldi mode,OWM_SLEEP
+               cpi rwbyte,0x0F ;; Write to Scratchpad
+               brne pro_rc_1
+               ldi mode,OWM_WRITE_SCRATCHPAD
+               ldi XL,low(scratchpad)  ;init sram pointer
+               ldi XH,high(scratchpad)
+               rjmp pro_out_bytep0
+pro_rc_1:
+               cpi rwbyte,0xAA
+               brne pro_rc_2
+               ldi mode,OWM_READ_SCRATCHPAD  ;;Read from Scratchpad
+               ldi XL,low(scratchpad)  ;init sram pointer
+               ldi XH,high(scratchpad)
+               inc smode
+               ld rwbyte,X+
+               rjmp pro_out_bytep0
+
+pro_rc_2:
+               cpi rwbyte,0xB8
+               brne pro_rc_3
+               ldi mode,OWM_RECALL_FLASH  ;; copy Flash page in Scratchpad
+               ldi XL,low(scratchpad)  ;init sram pointer
+               ldi XH,high(scratchpad)
+               rjmp pro_out_bytep0
+pro_rc_3:
+               cpi rwbyte,0x55 ; copy Scratchpad to Flash
+               brne pro_rc_4
+               ldi mode,OWM_SLEEP
+               rjmp pro_programm_page
+               
+pro_rc_4:
+               cpi rwbyte,0x89 ; Reset Device /Boot (new) Firmware
+               brne pro_rc_5
+               rjmp jreset             
+pro_rc_5:
+               cpi rwbyte,0x8B ; Clear the OWID saved in EEPROM / one ID1
+               brne pro_rc_6   
+               ldi temp,7
+pro_rc_5a:
+               ldi XL,low(E2END)
+               ldi XH,high(E2END)
+               sub XL,temp
+               out EEARH,XH
+               out EEARL,XL
+               ldi temp, (0<<EEPM1)|(0<<EEPM0)
+               out EECR, temp
+               ldi temp,0xFF
+               out EEDR, temp
+               sbi EECR, EEMPE
+               sbi EECR, EEPE
+               ret
+
+
+pro_rc_6:
+               cpi rwbyte,0x8C ; Clear the OWID saved in EEPROM / one ID2
+               brne pro_rc_7
+               ldi temp,7+8
+               rjmp pro_rc_5a
+
+pro_rc_7:
+               ret
+
+pro_write_scratchpad:
+               st X+,rwbyte
+               cpi XL,SRAM_START+8+66
+               brlo pro_write_scratchpad_next
+               ldi mode,OWM_SLEEP
+               ret             
+pro_write_scratchpad_next:
+               ldi bitp,1
+               ret
+
+pro_read_scratchpad:
+               cpi XL,SRAM_START+8+66
+               brlo pro_read_scratchpad_next
+               ldi mode,OWM_SLEEP
+               clr smode
+               ret
+pro_read_scratchpad_next:
+               ld rwbyte,X+
+               rjmp pro_out_bitp1
+
+
+pro_programm_page:
+.equ PAGESIZEB = PAGESIZE*2;PAGESIZEB is page size in BYTES, not words
+// .org SMALLBOOTSTART
+write_page:
+               ;transfer data from RAM to Flash page buffer
+               ldi bytep, PAGESIZEB ;init loop variable
+               ldi YL,low(scratchpad)  ;init sram pointer
+               ldi YH,high(scratchpad)
+               ld ZL,Y+
+               ld ZH,Y+
+               ;page erase
+               ldi spmcrval, (1<<PGERS) + (1<<SPMEN)
+               rcall do_spm
+wrloop:
+               ld r0, Y+
+               ld r1, Y+
+               ldi spmcrval, (1<<SPMEN)
+               rcall do_spm
+               adiw ZH:ZL, 2
+               subi bytep, 2;use subi for PAGESIZEB<=256
+               brne wrloop
+               ;execute page write
+               subi ZL, low(PAGESIZEB) ;restore pointer
+               sbci ZH, high(PAGESIZEB) ;not required for PAGESIZEB<=256
+               ldi spmcrval, (1<<PGWRT) + (1<<SPMEN)
+               rcall do_spm
+               ;read back and check, optional
+               ldi bytep, PAGESIZEB
+               subi YL, low(PAGESIZEB) ;restore pointer
+               sbci YH, high(PAGESIZEB)
+rdloop:
+               lpm r0, Z+
+               ld r1, Y+
+               cpse r0, r1
+               rjmp error
+               subi bytep, 2;use subi for PAGESIZEB<=256
+               brne rdloop
+               ;return
+               ret
+do_spm:
+                ;input: spmcrval determines SPM action
+               ;disable interrupts if enabled, store status
+               in temp2, SREG
+               cli
+               ;check for previous SPM complete
+wait:
+               in temp, SPMCSR
+               sbrc temp, SPMEN
+               rjmp wait
+               ;SPM timed sequence
+               out SPMCSR, spmcrval
+               spm
+               ;restore SREG (to enable interrupts if originally enabled)
+               out SREG, temp2
+               ret
+
+error:
+
+
+               ret
+
+pro_recall_flash:
+               st X+,rwbyte
+               ;inc bytep
+               cpi XL,SRAM_START+8+2
+               brlo pro_out_bitp1;pro_recall_flash_next
+               lds ZL,scratchpad
+               lds ZH,scratchpad+1
+pro_recall_flash_cl:
+               lpm temp,Z+
+               st X+,temp
+               cpi XL,SRAM_START+8+66
+               brne pro_recall_flash_cl
+               ldi mode,OWM_SLEEP
+               ret
+
+pro_out_read_command:
+               ldi mode,OWM_READ_COMMAND
+pro_out_bytep0:
+               ldi bytep,0
+pro_out_bitp1:
+               ldi bitp,1
+               ret             
+
+
+
+pro_serchrom_next_bit:
+               mov rwbyte,srbyte
+               mov temp2,rwbyte
+               com rwbyte
+               ror temp2  ;first bit in C
+               rol rwbyte ;C in first bit 
+               inc smode
+               ldi bitp,0x40
+               ldi mode,OWM_SEARCH_ROM_R  ;next mod Resive
+               ret
+
+
+pro_search_rom_s:
+               clr temp2
+               lsr srbyte ;shift in C lowest bit
+               ror temp2  ; shift in temp2 as highest bit
+               andi rwbyte,0x80  ;  clear other bits
+               eor temp2,rwbyte
+               breq pro_search_rom_s_goon
+               ldi mode,OWM_SLEEP
+               ret
+pro_search_rom_s_goon:
+               inc bytep
+               mov temp2,bytep
+               andi temp2,0x07
+               brne pro_serchrom_next_bit ;prepare next bit
+               mov temp2,bytep
+               andi temp2,0x40 ;;end
+               brne pro_search_rom_found
+               ;read next byte
+               ld srbyte,X+
+               rjmp pro_serchrom_next_bit
+
+pro_search_rom_found:
+               ldi mode,OWM_READ_COMMAND
+               rjmp pro_out_bytep0
+
+pro_search_rom_r:
+               clr smode
+               ldi mode,OWM_SEARCH_ROM_S
+               ldi bitp,0  ;go to searchrom_s after bit get
+               ret
+
+pro_owid: .DB  0xA3, 0xAA, 0x55, 0xAA, 0x55, 0xAA, 0x55, 0xFA
+
+
+
+
+
+wait_time:
+               out TCNT0,zero
+wait_time1:
+               in temp,TCNT0
+               cp temp,param
+               brlo wait_time1
+               ret
+
+
+.DSEG
+sowid: .BYTE 8
+scratchpad: .BYTE 66
\ No newline at end of file
diff --git a/programmer/programmer/programmer_8MHz.asm b/programmer/programmer/programmer_8MHz.asm
new file mode 100644 (file)
index 0000000..3bf5f2d
--- /dev/null
@@ -0,0 +1,489 @@
+.def srbyte = r12  ;byty for search rom algorithm
+.def writelow = r13;  marker for send low
+.def zero =r14;  always zero 
+.def smode=r15; if 1 then send 
+.def temp = r16 ; 
+.def temp2 = r17; 
+.def mode = r18 ; 
+.def bitp = r19 ; bit counter ... shift...
+.def rwbyte = r21;
+.def param = r22;
+.def bytep = r23  ;byte counter
+#define spmcrval  param
+
+
+.equ OWM_READ_ROM_COMMAND=0 ; 0 wegen schnellen test ist dieser wert 0! Daturch wird die Sprungdabelle nicht verwendet
+.equ OWM_SLEEP=1 ; Warten auf Reset
+.equ OWM_MATCH_ROM=2
+.equ OWM_SEARCH_ROM_S=3  ;send bit
+.equ OWM_SEARCH_ROM_R=4  ;resive master
+.equ OWM_READ_COMMAND=5
+.equ OWM_WRITE_SCRATCHPAD=6
+.equ OWM_READ_SCRATCHPAD=7
+.equ OWM_PROGRAMM_PAGE=8
+.equ OWM_RECALL_FLASH=9
+
+
+.equ OW_DDR = DDRB 
+.equ OW_PIN = PORTB2
+.equ OW_PORT = PORTB 
+.equ OW_PINN = PINB 
+
+;.equ SRAM_START = 0x60
+
+.macro set_clock
+               ldi temp,0x80;
+               out CLKPR,temp
+               ldi temp,@0
+               out CLKPR,temp
+.endmacro 
+
+.macro owwl
+               sbic OW_PINN,OW_PIN
+               rjmp pc-1
+.endmacro 
+
+.macro owwh
+               sbis OW_PINN,OW_PIN
+               rjmp pc-1
+.endmacro 
+
+
+
+
+ ;---------------------------------------------------
+; START of PROG 
+;---------------------------------------------------
+
+
+.CSEG 
+.ORG 0x000
+jreset:
+               rjmp start ; Reset-Vector 
+               reti ; 
+               reti ; 
+               reti ; 
+               reti ; 
+               reti ; 
+               reti ; 
+               reti ; 
+               reti ; 
+               reti ; 
+               reti ; 
+               reti ; 
+               reti ; 
+               reti ; 
+               reti ; 
+               reti ; 
+               reti ; 
+               reti ; 
+               reti ; 
+               reti ; 
+               reti ; 
+
+
+.ORG 0x0EC0
+
+start: 
+               cli
+               ldi temp,0
+               mov zero,temp
+               set_clock 0x00 ;8mhz
+               ldi mode,OWM_SLEEP
+               ldi temp,(1<<CS01) //1us
+               out TCCR0B,temp
+               ldi temp, HIGH(RAMEND) ; HIGH-Byte der obersten RAM-Adresse 
+               out SPH, temp 
+               ldi temp, LOW(RAMEND) ; LOW-Byte der obersten RAM-Adresse 
+               out SPL, temp 
+               ;ldi temp,1
+               ;out DDRB,temp
+               clr writelow
+               clr bitp
+       
+               ;sbi PORTB,0
+               ldi ZL,low(pro_owid*2) 
+               ldi ZH,high(pro_owid*2) 
+               ldi XL,low(sowid)
+               ldi XH,high(sowid)
+               ;ldi temp2,8
+pro_copy_loop: ;copy ID on SRAM for better handling
+               lpm temp,Z+
+               st X+,temp
+               cpi XL,SRAM_START+8
+               brlo pro_copy_loop
+pro_loop:
+               ;sbi PORTB,0
+               owwl                            ;wait for line goes low (polling)
+               sbrs writelow,0         ;test of zero send
+               rjmp pro_loop1          ;no ? goes next
+               sbi OW_DDR,OW_PIN       ;yes pull line to low
+               ldi param,50            ;wait for 50 us
+               rcall wait_time
+               clr writelow            ;reset write low indecator
+               cbi OW_DDR,OW_PIN   ;release line
+               owwh                            ;wait for line is high (it can takes some time cause of the capacity of line)
+pro_loop1:
+               tst smode                       ;smode=1 for slave sends to master
+               breq pro_loop_resv
+pro_loop_send:
+               tst bitp
+               brne pro_loop_send1
+               rcall pro_hb
+               tst smode
+               breq pro_loop_end ; now reading ... do nothing 
+pro_loop_send1:  ;prebare next bit
+               sbrs rwbyte ,0; if bit 0 set in rwbyte then skip next command
+               inc writelow
+               lsl bitp
+               ror rwbyte
+               rjmp pro_loop_end
+
+pro_loop_resv:
+               ldi param,15  ;wait 15us
+               rcall wait_time
+               lsr rwbyte
+               ;cbi PORTB,0
+               sbic OW_PINN,OW_PIN  ;test line
+               ori rwbyte,0x80
+               lsl bitp
+               brne pro_loop_end ;no handle need
+               rcall pro_hb
+               tst smode
+               brne pro_loop_send ; Nach dem Gelesen byte koennte gesendet werden muessen....
+pro_loop_end:
+               //owwh
+               out TCNT0,zero
+pro_loop_end_test_reset:
+               sbic OW_PINN,OW_PIN  //leitung wieder high
+               rjmp pro_loop
+               in temp,TCNT0
+               cpi temp,130
+               brlo pro_loop_end_test_reset
+               rcall pro_sleep_s2
+               rjmp pro_loop
+
+
+
+
+pro_sleep:
+               out TCNT0,zero
+pro_sleep_s1:
+               sbic OW_PINN,OW_PIN  //leitung wieder high
+               ret
+               in temp,TCNT0
+               cpi temp,200
+               brlo pro_sleep_s1
+               //leitung wieder high
+pro_sleep_s2:
+               owwh 
+               ldi param,40
+               rcall wait_time
+               //Presents Impuls
+               sbi OW_DDR,OW_PIN
+               ldi param,130
+               rcall wait_time
+               cbi OW_DDR,OW_PIN
+               //init read byte
+               ldi bitp,0x01
+               ldi rwbyte,0
+               clr smode
+               ldi mode,OWM_READ_ROM_COMMAND
+               //Wait for all other devices presents impuls finished
+               ldi param,40
+               rcall wait_time
+               ret
+
+
+
+pro_hb:
+               ldi ZL,low(pro_stable) 
+               ldi ZH,high(pro_stable) 
+               add ZL,mode 
+               adc ZH,zero
+               icall
+               ret
+
+pro_stable: 
+               rjmp pro_read_rom_command
+               rjmp pro_sleep 
+               rjmp pro_match_rom
+               rjmp pro_search_rom_s
+               rjmp pro_search_rom_r
+               rjmp pro_read_command
+               rjmp pro_write_scratchpad
+               rjmp pro_read_scratchpad
+               rjmp pro_programm_page
+               rjmp pro_recall_flash
+
+pro_read_rom_command:
+               ldi mode,OWM_SLEEP
+               cpi rwbyte,0xCC
+               brne pro_rcc_1
+               ldi mode,OWM_READ_COMMAND
+               rjmp pro_out_bitp1
+pro_rcc_1:
+               cpi rwbyte,0xF0 ;Searchrom
+               brne pro_rcc_2
+               ldi XL,low(sowid)  ;init sram pointer
+               ldi XH,high(sowid)
+               ld srbyte,X+
+               ldi bytep,0
+               rjmp pro_serchrom_next_bit
+pro_rcc_2:
+               cpi rwbyte,0x55 ;Matchrom
+               brne pro_rcc_3
+//             rcall pro_owidinit
+               ldi XL,low(sowid)  ;init sram pointer
+               ldi XH,high(sowid)
+               ldi mode,OWM_MATCH_ROM
+               rjmp pro_out_bytep0
+
+pro_rcc_3:
+               ret
+
+pro_match_rom:         
+               ld temp,X+
+               cp temp,rwbyte
+               breq pro_match_rom_next
+               ldi mode,OWM_SLEEP
+               ret
+pro_match_rom_next:                                    
+               cpi XL,SRAM_START+8
+               breq pro_match_rom_found
+               rjmp pro_out_bitp1
+pro_match_rom_found:
+           ldi mode,OWM_READ_COMMAND
+               rjmp pro_out_bitp1
+
+pro_read_command:
+               ldi mode,OWM_SLEEP
+               cpi rwbyte,0x0F ;; Write to Scratchpad
+               brne pro_rc_1
+               ldi mode,OWM_WRITE_SCRATCHPAD
+               ldi XL,low(scratchpad)  ;init sram pointer
+               ldi XH,high(scratchpad)
+               rjmp pro_out_bytep0
+pro_rc_1:
+               cpi rwbyte,0xAA
+               brne pro_rc_2
+               ldi mode,OWM_READ_SCRATCHPAD  ;;Read from Scratchpad
+               ldi XL,low(scratchpad)  ;init sram pointer
+               ldi XH,high(scratchpad)
+               inc smode
+               ld rwbyte,X+
+               rjmp pro_out_bytep0
+
+pro_rc_2:
+               cpi rwbyte,0xB8
+               brne pro_rc_3
+               ldi mode,OWM_RECALL_FLASH  ;; copy Flash page in Scratchpad
+               ldi XL,low(scratchpad)  ;init sram pointer
+               ldi XH,high(scratchpad)
+               rjmp pro_out_bytep0
+pro_rc_3:
+               cpi rwbyte,0x55 ; copy Scratchpad to Flash
+               brne pro_rc_4
+               ldi mode,OWM_SLEEP
+               rjmp pro_programm_page
+               
+pro_rc_4:
+               cpi rwbyte,0x89 ; Reset Device /Boot (new) Firmware
+               brne pro_rc_5
+               rjmp jreset             
+pro_rc_5:
+               cpi rwbyte,0x8B ; Clear the OWID saved in EEPROM / one ID1
+               brne pro_rc_6   
+               ldi temp,7
+pro_rc_5a:
+               ldi XL,low(E2END)
+               ldi XH,high(E2END)
+               sub XL,temp
+               out EEARH,XH
+               out EEARL,XL
+               ldi temp, (0<<EEPM1)|(0<<EEPM0)
+               out EECR, temp
+               ldi temp,0xFF
+               out EEDR, temp
+               sbi EECR, EEMPE
+               sbi EECR, EEPE
+               ret
+
+
+pro_rc_6:
+               cpi rwbyte,0x8C ; Clear the OWID saved in EEPROM / one ID2
+               brne pro_rc_7
+               ldi temp,7+8
+               rjmp pro_rc_5a
+
+pro_rc_7:
+               ret
+
+pro_write_scratchpad:
+               st X+,rwbyte
+               cpi XL,SRAM_START+8+66
+               brlo pro_write_scratchpad_next
+               ldi mode,OWM_SLEEP
+               ret             
+pro_write_scratchpad_next:
+               ldi bitp,1
+               ret
+
+pro_read_scratchpad:
+               cpi XL,SRAM_START+8+66
+               brlo pro_read_scratchpad_next
+               ldi mode,OWM_SLEEP
+               clr smode
+               ret
+pro_read_scratchpad_next:
+               ld rwbyte,X+
+               rjmp pro_out_bitp1
+
+
+pro_programm_page:
+.equ PAGESIZEB = PAGESIZE*2;PAGESIZEB is page size in BYTES, not words
+// .org SMALLBOOTSTART
+write_page:
+               ;transfer data from RAM to Flash page buffer
+               ldi bytep, PAGESIZEB ;init loop variable
+               ldi YL,low(scratchpad)  ;init sram pointer
+               ldi YH,high(scratchpad)
+               ld ZL,Y+
+               ld ZH,Y+
+               ;page erase
+               ldi spmcrval, (1<<PGERS) + (1<<SPMEN)
+               rcall do_spm
+wrloop:
+               ld r0, Y+
+               ld r1, Y+
+               ldi spmcrval, (1<<SPMEN)
+               rcall do_spm
+               adiw ZH:ZL, 2
+               subi bytep, 2;use subi for PAGESIZEB<=256
+               brne wrloop
+               ;execute page write
+               subi ZL, low(PAGESIZEB) ;restore pointer
+               sbci ZH, high(PAGESIZEB) ;not required for PAGESIZEB<=256
+               ldi spmcrval, (1<<PGWRT) + (1<<SPMEN)
+               rcall do_spm
+               ;read back and check, optional
+               ldi bytep, PAGESIZEB
+               subi YL, low(PAGESIZEB) ;restore pointer
+               sbci YH, high(PAGESIZEB)
+rdloop:
+               lpm r0, Z+
+               ld r1, Y+
+               cpse r0, r1
+               rjmp error
+               subi bytep, 2;use subi for PAGESIZEB<=256
+               brne rdloop
+               ;return
+               ret
+do_spm:
+                ;input: spmcrval determines SPM action
+               ;disable interrupts if enabled, store status
+               in temp2, SREG
+               cli
+               ;check for previous SPM complete
+wait:
+               in temp, SPMCSR
+               sbrc temp, SPMEN
+               rjmp wait
+               ;SPM timed sequence
+               out SPMCSR, spmcrval
+               spm
+               ;restore SREG (to enable interrupts if originally enabled)
+               out SREG, temp2
+               ret
+
+error:
+
+
+               ret
+
+pro_recall_flash:
+               st X+,rwbyte
+               ;inc bytep
+               cpi XL,SRAM_START+8+2
+               brlo pro_out_bitp1;pro_recall_flash_next
+               lds ZL,scratchpad
+               lds ZH,scratchpad+1
+pro_recall_flash_cl:
+               lpm temp,Z+
+               st X+,temp
+               cpi XL,SRAM_START+8+66
+               brne pro_recall_flash_cl
+               ldi mode,OWM_SLEEP
+               ret
+
+pro_out_read_command:
+               ldi mode,OWM_READ_COMMAND
+pro_out_bytep0:
+               ldi bytep,0
+pro_out_bitp1:
+               ldi bitp,1
+               ret             
+
+
+
+pro_serchrom_next_bit:
+               mov rwbyte,srbyte
+               mov temp2,rwbyte
+               com rwbyte
+               ror temp2  ;first bit in C
+               rol rwbyte ;C in first bit 
+               inc smode
+               ldi bitp,0x40
+               ldi mode,OWM_SEARCH_ROM_R  ;next mod Resive
+               ret
+
+
+pro_search_rom_s:
+               clr temp2
+               lsr srbyte ;shift in C lowest bit
+               ror temp2  ; shift in temp2 as highest bit
+               andi rwbyte,0x80  ;  clear other bits
+               eor temp2,rwbyte
+               breq pro_search_rom_s_goon
+               ldi mode,OWM_SLEEP
+               ret
+pro_search_rom_s_goon:
+               inc bytep
+               mov temp2,bytep
+               andi temp2,0x07
+               brne pro_serchrom_next_bit ;prepare next bit
+               mov temp2,bytep
+               andi temp2,0x40 ;;end
+               brne pro_search_rom_found
+               ;read next byte
+               ld srbyte,X+
+               rjmp pro_serchrom_next_bit
+
+pro_search_rom_found:
+               ldi mode,OWM_READ_COMMAND
+               rjmp pro_out_bytep0
+
+pro_search_rom_r:
+               clr smode
+               ldi mode,OWM_SEARCH_ROM_S
+               ldi bitp,0  ;go to searchrom_s after bit get
+               ret
+
+pro_owid: .DB  0xA3, 0xAA, 0x55, 0xAA, 0x55, 0xAA, 0x55, 0xFA
+
+
+
+
+
+wait_time:
+               out TCNT0,zero
+wait_time1:
+               in temp,TCNT0
+               cp temp,param
+               brlo wait_time1
+               ret
+
+
+.DSEG
+sowid: .BYTE 8
+scratchpad: .BYTE 66
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