Many changes from 2018
[owSlave2.git] / DS2450_MAX44008 / DS2450_MAX44008.c
1 \r
2 // Copyright (c) 2017, Tobias Mueller tm(at)tm3d.de\r
3 // All rights reserved.\r
4 //\r
5 // Redistribution and use in source and binary forms, with or without\r
6 // modification, are permitted provided that the following conditions are\r
7 // met:\r
8 //\r
9 //  * Redistributions of source code must retain the above copyright\r
10 //    notice, this list of conditions and the following disclaimer.\r
11 //  * Redistributions in binary form must reproduce the above copyright\r
12 //    notice, this list of conditions and the following disclaimer in the\r
13 //    documentation and/or other materials provided with the\r
14 //    distribution.\r
15 //  * All advertising materials mentioning features or use of this\r
16 //    software must display the following acknowledgement: This product\r
17 //    includes software developed by tm3d.de and its contributors.\r
18 //  * Neither the name of tm3d.de nor the names of its contributors may\r
19 //    be used to endorse or promote products derived from this software\r
20 //    without specific prior written permission.\r
21 //\r
22 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\r
23 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\r
24 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
25 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT\r
26 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,\r
27 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\r
28 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
29 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
30 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\r
31 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\r
32 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
33 \r
34 #define F_CPU 8000000UL\r
35 #include <avr/io.h>\r
36 #include <avr/interrupt.h>\r
37 #include <util/delay.h>\r
38 #include <avr/wdt.h>\r
39 #include <avr/sleep.h>\r
40 #include <avr/pgmspace.h>\r
41 #include "../common/I2C/USI_TWI_Master.h"\r
42 \r
43 extern void OWINIT();\r
44 extern void EXTERN_SLEEP();\r
45 \r
46 uint8_t owid[8]={0x20, 0xA2, 0xD9, 0x84, 0x00, 0x16, 0x02, 0x5D};/**/\r
47 uint8_t config_info[26]={0x06,0x09,0x06,0x09,0x06,0x09,0x06,0x09,0x02,20,20,20,20,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00};\r
48 \r
49 #if (owid>128) \r
50 #error "Variable not correct"\r
51 #endif\r
52 \r
53 extern uint8_t mode;\r
54 extern uint8_t gcontrol;\r
55 extern uint8_t reset_indicator;\r
56 extern uint8_t alarmflag;\r
57 \r
58 \r
59 typedef union {\r
60         volatile uint8_t bytes[0x20];\r
61         struct {\r
62                 //Page0\r
63                 uint16_t A;  //0\r
64                 uint16_t B;  //2\r
65                 uint16_t C;  //4\r
66                 uint16_t D;  //6\r
67                 //Page1\r
68                 uint8_t CSA1;\r
69                 uint8_t CSA2;\r
70                 uint8_t CSB1;\r
71                 uint8_t CSB2;\r
72                 uint8_t CSC1;\r
73                 uint8_t CSC2;\r
74                 uint8_t CSD1;\r
75                 uint8_t CSD2;\r
76                 //Page2\r
77                 uint8_t LA;\r
78                 uint8_t HA;\r
79                 uint8_t LB;\r
80                 uint8_t HB;\r
81                 uint8_t LC;\r
82                 uint8_t HC;\r
83                 uint8_t LD;\r
84                 uint8_t HD;\r
85                 //Page3\r
86                 uint8_t FC1;\r
87                 uint8_t FC2;\r
88                 uint8_t FC3;\r
89                 uint8_t FC4;\r
90                 uint8_t VCCP;\r
91                 uint8_t FC5;\r
92                 uint8_t FC6;\r
93                 uint8_t FC7;\r
94                 uint8_t convc1;\r
95                 uint8_t convc2;\r
96                 \r
97                 \r
98         };\r
99 } pack_t;\r
100 volatile pack_t pack;\r
101 \r
102 \r
103         uint8_t checkMAX44008(uint8_t nr) {\r
104                 volatile uint8_t b1;\r
105                 nr=(nr<<1)&0x02f;\r
106                 \r
107                 I2c_StartCondition();\r
108                 I2c_WriteByte(0b10000000|nr);\r
109                 I2c_WriteByte(0x00);\r
110                 I2c_StartCondition();\r
111                 I2c_WriteByte (0b10000001|nr);\r
112                 b1 =I2c_ReadByte(NO_ACK);\r
113                 I2c_StopCondition();\r
114                 return b1!=0xFF;\r
115                 \r
116         }\r
117 \r
118 \r
119 \r
120 int main(void){\r
121         pack.A=0;\r
122         pack.B=0;\r
123         pack.C=0;\r
124         pack.D=0;\r
125         pack.CSA1=0x08;\r
126         pack.CSA2=0x8C;\r
127         pack.CSB1=0x08;\r
128         pack.CSB2=0x8C;\r
129         pack.CSC1=0x08;\r
130         pack.CSC2=0x8C;\r
131         pack.CSD1=0x08;\r
132         pack.CSD2=0x8C;\r
133         pack.HA=0xFF;\r
134         pack.LA=0x00;\r
135         pack.HB=0xFF;\r
136         pack.LB=0x00;\r
137         pack.HC=0xFF;\r
138         pack.LC=0x00;\r
139         pack.HD=0xFF;\r
140         pack.LD=0x00;\r
141         pack.VCCP=0;\r
142 \r
143         PORTA=0xFF;\r
144         PORTB=0xFF;\r
145 \r
146         OWINIT();\r
147 \r
148         MCUCR &=~(1<<PUD); //All Pins Pullup...\r
149         MCUCR |=(1<<BODS);\r
150         //PORTA&=~((1<<PINA0)|(1<<PINA1)|(1<<PINA2)|(1<<PINA3));\r
151 \r
152         ADCSRA=(1<<ADEN)|(1<ADPS0)|(1<<ADPS2);\r
153 \r
154         \r
155         \r
156         gcontrol=1;\r
157         ADCSRB|=(1<<ADLAR); \r
158         USI_TWI_Master_Initialise();\r
159         \r
160 \r
161 \r
162 \r
163         sei();\r
164         \r
165         //DDRB|=(1<<PINB1);\r
166 \r
167     while(1)   {\r
168 \r
169 \r
170                 if (gcontrol) {\r
171                         //PORTB|=(1<<PINB1);\r
172                         uint8_t bb=1;\r
173                         uint8_t bb1=1;\r
174                         for(uint8_t i=0;i<4;i++){\r
175                                 if (pack.convc1&bb1) {\r
176                                         if (pack.convc2&(bb)) {pack.bytes[i*2]=0;pack.bytes[i*2+1]=0;}\r
177                                         bb=bb<<1;\r
178                                         if (pack.convc2&(bb)) {pack.bytes[i*2]=0xFF;pack.bytes[i*2+1]=0xFF;}\r
179                                         bb=bb<<1;\r
180                                 } else bb=bb<<2;\r
181                                 bb1=bb1<<1;                             \r
182                         }\r
183                         //CHanel A\r
184                         if (pack.convc1&1) {\r
185                                 if (pack.CSA2&0x01)     ADMUX=0; else ADMUX=0x80;\r
186                                 _delay_us(100);\r
187                                 ADCSRA|=(1<<ADSC);\r
188                                 while ((ADCSRA&(1<<ADSC)));\r
189                                 cli();pack.A=ADC;sei();\r
190                                 pack.A= checkMAX44008(0);\r
191                                 alarmflag=0;\r
192                                 if (pack.CSA2&0x08)  //AEH\r
193                                         if (pack.bytes[1]>pack.HA) {alarmflag=1;pack.CSA2|=0x20;}\r
194                                 if (pack.CSA2&0x04)  //AEL\r
195                                         if (pack.bytes[1]<pack.LA) {alarmflag=1;pack.CSA2|=0x10;}\r
196                         }\r
197 \r
198                         if (pack.convc1&2) {\r
199                                 if (pack.CSB2&0x01)     ADMUX=1; else ADMUX=0x81;\r
200                                 _delay_us(100);\r
201                                 ADCSRA|=(1<<ADSC);\r
202                                 while ((ADCSRA&(1<<ADSC)));\r
203                                 cli();pack.B=ADC;sei();\r
204                                 pack.B= checkMAX44008(1);\r
205                                 if (pack.CSB2&0x08)  //AEH\r
206                                         if (pack.bytes[1]>pack.HB) {alarmflag=1;pack.CSB2|=0x20;}\r
207                                 if (pack.CSB2&0x04)  //AEL\r
208                                         if (pack.bytes[1]<pack.LB) {alarmflag=1;pack.CSB2|=0x10;}\r
209                         }\r
210 \r
211                         if (pack.convc1&4) {\r
212                                 if (pack.CSC2&0x01)     ADMUX=2; else ADMUX=0x82;\r
213                                 _delay_us(100);\r
214                                 ADCSRA|=(1<<ADSC);\r
215                                 while ((ADCSRA&(1<<ADSC)));\r
216                                 cli();pack.C=ADC;sei();\r
217                                 if (pack.CSC2&0x08)  //AEH\r
218                                         if (pack.bytes[1]>pack.HC) {alarmflag=1;pack.CSC2|=0x20;}\r
219                                 if (pack.CSC2&0x04)  //AEL\r
220                                         if (pack.bytes[1]<pack.LC) {alarmflag=1;pack.CSC2|=0x10;}\r
221                         } \r
222                         if (pack.convc1&8) {\r
223                                 if (pack.CSD2&0x01)     ADMUX=3; else ADMUX=0x83;\r
224                                 _delay_us(100);\r
225                                 ADCSRA|=(1<<ADSC);\r
226                                 while ((ADCSRA&(1<<ADSC)));\r
227                                 cli();pack.D=ADC;sei();\r
228                                 if (pack.CSD2&0x08)  //AEH\r
229                                         if (pack.bytes[1]>pack.HD) {alarmflag=1;pack.CSD2|=0x20;}\r
230                                 if (pack.CSD2&0x04)  //AEL\r
231                                         if (pack.bytes[1]<pack.LD) {alarmflag=1;pack.CSD2|=0x10;}\r
232                         }\r
233                         \r
234                         EXTERN_SLEEP();\r
235                         //PORTB&=~(1<<PINB1);\r
236                 }\r
237 \r
238                 uint8_t bb=1;\r
239                 for(uint8_t i=0;i<4;i++) {\r
240                         if (pack.bytes[8+i*2]&0x80) {  //Chanel as output\r
241                                 if (pack.bytes[8+i*2]&0x40) {\r
242                                         DDRA|=bb;\r
243                                 } else {\r
244                                         DDRA&=~bb;\r
245                                 }\r
246                         } else {\r
247                                 DDRA&=~bb;\r
248                         }\r
249                         bb=bb*2;\r
250                 }\r
251                 \r
252 #if  defined(__AVR_ATtiny25__)||defined(__AVR_ATtiny45__)  || defined(__AVR_ATtiny85__)\r
253                         if (((TIMSK & (1<<TOIE0))==0)&& (mode==0))\r
254 #endif                  \r
255 #if  defined(__AVR_ATtiny24__)||defined(__AVR_ATtiny44__)  || defined(__AVR_ATtiny84__) ||defined(__AVR_ATtiny24A__)||defined(__AVR_ATtiny44A__)  || defined(__AVR_ATtiny84A__)\r
256                         if (((TIMSK0 & (1<<TOIE0))==0)&& (mode==0))\r
257 #endif\r
258                           {\r
259 \r
260                         MCUCR|=(1<<SE)|(1<<SM1);\r
261                         MCUCR&=~(1<<ISC01);\r
262                 } else {\r
263                         MCUCR|=(1<<SE);\r
264                         MCUCR&=~(1<<SM1);\r
265                 }\r
266         //      asm("SLEEP");\r
267    }\r
268 \r
269 \r
270 }