1 /*****************************************************************************
5 * File : USI_TWI_Master.h
6 * Compiler : AVRGCC Toolchain version 3.4.2
7 * Revision : $Revision: 992 $
8 * Date : $Date: 2013-11-07 $
9 * Updated by : $Author: Atmel $
11 * Support mail : avr@atmel.com
13 * Supported devices : All device with USI module can be used.
14 * The example is written for the ATmega169, ATtiny26 and ATtiny2313
16 * AppNote : AVR310 - Using the USI module as a TWI Master
18 * Description : This is an implementation of an TWI master using
19 * the USI module as basis. The implementation assumes the AVR to
20 * be the only TWI master in the system and can therefore not be
21 * used in a multi-master system.
22 * Usage : Initialize the USI module by calling the USI_TWI_Master_Initialise()
23 * function. Hence messages/data are transceived on the bus using
24 * the USI_TWI_Start_Transceiver_With_Data() function. If the transceiver
25 * returns with a fail, then use USI_TWI_Get_Status_Info to evaluate the
26 * couse of the failure.
28 ****************************************************************************/
30 //********** Defines **********//
32 // Defines controlling timing limits
35 #define SYS_CLK 8000.0 // [kHz]
37 #ifdef TWI_FAST_MODE // TWI FAST mode timing limits. SCL = 100-400kHz
38 #define T2_TWI ((SYS_CLK *1300) /1000000) +1 // >1,3us
39 #define T4_TWI ((SYS_CLK * 600) /1000000) +1 // >0,6us
41 #else // TWI STANDARD mode timing limits. SCL <= 100kHz
42 #define T2_TWI ((SYS_CLK *4700) /1000000) +1 // >4,7us
43 #define T4_TWI ((SYS_CLK *4000) /1000000) +1 // >4,0us
46 // Defines controling code generating
47 //#define PARAM_VERIFICATION
48 //#define NOISE_TESTING
49 //#define SIGNAL_VERIFY
51 //USI_TWI messages and flags and bit masks
54 /****************************************************************************
55 Bit and byte definitions
56 ****************************************************************************/
57 #define TWI_READ_BIT 0 // Bit position for R/W bit in "address byte".
58 #define TWI_ADR_BITS 1 // Bit position for LSB of the slave address bits in the init byte.
59 #define TWI_NACK_BIT 0 // Bit position for (N)ACK bit.
61 #define USI_TWI_NO_DATA 0x00 // Transmission buffer is empty
62 #define USI_TWI_DATA_OUT_OF_BOUND 0x01 // Transmission buffer is outside SRAM space
63 #define USI_TWI_UE_START_CON 0x02 // Unexpected Start Condition
64 #define USI_TWI_UE_STOP_CON 0x03 // Unexpected Stop Condition
65 #define USI_TWI_UE_DATA_COL 0x04 // Unexpected Data Collision (arbitration)
66 #define USI_TWI_NO_ACK_ON_DATA 0x05 // The slave did not acknowledge all data
67 #define USI_TWI_NO_ACK_ON_ADDRESS 0x06 // The slave did not acknowledge the address
68 #define USI_TWI_MISSING_START_CON 0x07 // Generated Start Condition not detected on bus
69 #define USI_TWI_MISSING_STOP_CON 0x08 // Generated Stop Condition not detected on bus
71 // Device dependant defines
73 #if defined(__AVR_AT90Mega169__) | defined(__AVR_ATmega169PA__) | \
74 defined(__AVR_AT90Mega165__) | defined(__AVR_ATmega165__) | \
75 defined(__AVR_ATmega325__) | defined(__AVR_ATmega3250__) | \
76 defined(__AVR_ATmega645__) | defined(__AVR_ATmega6450__) | \
77 defined(__AVR_ATmega329__) | defined(__AVR_ATmega3290__) | \
78 defined(__AVR_ATmega649__) | defined(__AVR_ATmega6490__)
80 #define PORT_USI PORTE
82 #define PORT_USI_SDA PORTE5
83 #define PORT_USI_SCL PORTE4
84 #define PIN_USI_SDA PINE5
85 #define PIN_USI_SCL PINE4
88 #if defined(__AVR_ATtiny25__) | defined(__AVR_ATtiny45__) | defined(__AVR_ATtiny85__) | \
89 defined(__AVR_AT90Tiny26__) | defined(__AVR_ATtiny26__)
91 #define PORT_USI PORTB
93 #define PORT_USI_SDA PORTB0
94 #define PORT_USI_SCL PORTB2
95 #define PIN_USI_SDA PINB0
96 #define PIN_USI_SCL PINB2
99 #if defined(__AVR_AT90Tiny2313__) | defined(__AVR_ATtiny2313__)
101 #define PORT_USI PORTB
103 #define PORT_USI_SDA PORTB5
104 #define PORT_USI_SCL PORTB7
105 #define PIN_USI_SDA PINB5
106 #define PIN_USI_SCL PINB7
109 #if defined(__AVR_ATtiny84__) | defined(__AVR_ATtiny84A__)
111 #define PORT_USI PORTA
113 #define PORT_USI_SDA PORTA6
114 #define PORT_USI_SCL PORTA4
115 #define PIN_USI_SDA PINA6
116 #define PIN_USI_SCL PINA4
123 #define ACK (1<<TWI_NACK_BIT )
127 //********** Prototypes **********//
129 void USI_TWI_Master_Initialise( void );
130 unsigned char USI_TWI_Start_Transceiver_With_Data( unsigned char * , unsigned char );
131 unsigned char USI_TWI_Get_State_Info( void );
133 unsigned char I2c_WriteByte(unsigned char msg);
134 unsigned char I2c_ReadByte(unsigned char ack_mode);
135 void I2c_StartCondition();
136 void I2c_StopCondition();