programmer/programmer/programmer.asm

   1 .def srbyte = r12  ;byty for search rom algorithm\r
   2 .def writelow = r13;  marker for send low\r
   3 .def zero =r14;  always zero \r
   4 .def smode=r15; if 1 then send \r
   5 .def temp = r16 ; \r
   6 .def temp2 = r17; \r
   7 .def mode = r18 ; \r
   8 .def bitp = r19 ; bit counter ... shift...\r
   9 .def rwbyte = r21;\r
  10 .def param = r22;\r
  11 .def bytep = r23  ;byte counter\r
  12 #define spmcrval  param\r
  13 \r
  14 \r
  15 .equ OWM_READ_ROM_COMMAND=0 ; 0 wegen schnellen test ist dieser wert 0! Daturch wird die Sprungdabelle nicht verwendet\r
  16 .equ OWM_SLEEP=1 ; Warten auf Reset\r
  17 .equ OWM_MATCH_ROM=2\r
  18 .equ OWM_SEARCH_ROM_S=3  ;send bit\r
  19 .equ OWM_SEARCH_ROM_R=4  ;resive master\r
  20 .equ OWM_READ_COMMAND=5\r
  21 .equ OWM_WRITE_SCRATCHPAD=6\r
  22 .equ OWM_READ_SCRATCHPAD=7\r
  23 .equ OWM_PROGRAMM_PAGE=8\r
  24 .equ OWM_RECALL_FLASH=9\r
  25 \r
  26 \r
  27 .equ OW_DDR = DDRB \r
  28 .equ OW_PIN = PORTB2\r
  29 .equ OW_PORT = PORTB \r
  30 .equ OW_PINN = PINB \r
  31 \r
  32 ;.equ SRAM_START = 0x60\r
  33 \r
  34 .macro set_clock\r
  35                 ldi temp,0x80;\r
  36                 out CLKPR,temp\r
  37                 ldi temp,@0\r
  38                 out CLKPR,temp\r
  39 .endmacro \r
  40 \r
  41 .macro owwl\r
  42                 sbic OW_PINN,OW_PIN\r
  43                 rjmp pc-1\r
  44 .endmacro \r
  45 \r
  46 .macro owwh\r
  47                 sbis OW_PINN,OW_PIN\r
  48                 rjmp pc-1\r
  49 .endmacro \r
  50 \r
  51 \r
  52 \r
  53 \r
  54  ;---------------------------------------------------\r
  55 ; START of PROG \r
  56 ;---------------------------------------------------\r
  57 \r
  58 \r
  59 .CSEG \r
  60 .ORG 0x000\r
  61 jreset:\r
  62                 rjmp start ; Reset-Vector \r
  63                 reti ; \r
  64                 reti ; \r
  65                 reti ; \r
  66                 reti ; \r
  67                 reti ; \r
  68                 reti ; \r
  69                 reti ; \r
  70                 reti ; \r
  71                 reti ; \r
  72                 reti ; \r
  73                 reti ; \r
  74                 reti ; \r
  75                 reti ; \r
  76                 reti ; \r
  77                 reti ; \r
  78                 reti ; \r
  79                 reti ; \r
  80                 reti ; \r
  81                 reti ; \r
  82                 reti ; \r
  83 \r
  84 \r
  85 .ORG 0x0EC0\r
  86 \r
  87 start: \r
  88                 cli\r
  89                 ldi temp,0\r
  90                 mov zero,temp\r
  91                 set_clock 0x00 ;8mhz\r
  92                 ldi mode,OWM_SLEEP\r
  93                 ldi temp,(1<<CS01) //1us\r
  94                 out TCCR0B,temp\r
  95                 ldi temp, HIGH(RAMEND) ; HIGH-Byte der obersten RAM-Adresse \r
  96                 out SPH, temp \r
  97                 ldi temp, LOW(RAMEND) ; LOW-Byte der obersten RAM-Adresse \r
  98                 out SPL, temp \r
  99                 ;ldi temp,1\r
 100                 ;out DDRB,temp\r
 101                 clr writelow\r
 102                 clr bitp\r
 103         \r
 104                 ;sbi PORTB,0\r
 105                 ldi ZL,low(pro_owid*2) \r
 106                 ldi ZH,high(pro_owid*2) \r
 107                 ldi XL,low(sowid)\r
 108                 ldi XH,high(sowid)\r
 109                 ;ldi temp2,8\r
 110 pro_copy_loop: ;copy ID on SRAM for better handling\r
 111                 lpm temp,Z+\r
 112                 st X+,temp\r
 113                 cpi XL,SRAM_START+8\r
 114                 brlo pro_copy_loop\r
 115 pro_loop:\r
 116                 ;sbi PORTB,0\r
 117                 owwl                            ;wait for line goes low (polling)\r
 118                 sbrs writelow,0         ;test of zero send\r
 119                 rjmp pro_loop1          ;no ? goes next\r
 120                 sbi OW_DDR,OW_PIN       ;yes pull line to low\r
 121                 ldi param,45            ;wait for 50 us\r
 122                 rcall wait_time\r
 123                 clr writelow            ;reset write low indecator\r
 124                 cbi OW_DDR,OW_PIN   ;release line\r
 125                 owwh                            ;wait for line is high (it can takes some time cause of the capacity of line)\r
 126 pro_loop1:\r
 127                 tst smode                       ;smode=1 for slave sends to master\r
 128                 breq pro_loop_resv\r
 129 pro_loop_send:\r
 130                 tst bitp\r
 131                 brne pro_loop_send1\r
 132                 rcall pro_hb\r
 133                 tst smode\r
 134                 breq pro_loop_end ; now reading ... do nothing \r
 135 pro_loop_send1:  ;prebare next bit\r
 136                 sbrs rwbyte ,0; if bit 0 set in rwbyte then skip next command\r
 137                 inc writelow\r
 138                 lsl bitp\r
 139                 ror rwbyte\r
 140                 rjmp pro_loop_end\r
 141 \r
 142 pro_loop_resv:\r
 143                 ldi param,15  ;wait 15us\r
 144                 rcall wait_time\r
 145                 lsr rwbyte\r
 146                 ;cbi PORTB,0\r
 147                 sbic OW_PINN,OW_PIN  ;test line\r
 148                 ori rwbyte,0x80\r
 149                 lsl bitp\r
 150                 brne pro_loop_end ;no handle need\r
 151                 rcall pro_hb\r
 152                 tst smode\r
 153                 brne pro_loop_send ; Nach dem Gelesen byte koennte gesendet werden muessen....\r
 154 pro_loop_end:\r
 155                 //owwh\r
 156                 out TCNT0,zero\r
 157 pro_loop_end_test_reset:\r
 158                 sbic OW_PINN,OW_PIN  //leitung wieder high\r
 159                 rjmp pro_loop\r
 160                 in temp,TCNT0\r
 161                 cpi temp,130\r
 162                 brlo pro_loop_end_test_reset\r
 163                 rcall pro_sleep_s2\r
 164                 rjmp pro_loop\r
 165 \r
 166 \r
 167 \r
 168 \r
 169 pro_sleep:\r
 170                 out TCNT0,zero\r
 171 pro_sleep_s1:\r
 172                 sbic OW_PINN,OW_PIN  //leitung wieder high\r
 173                 ret\r
 174                 in temp,TCNT0\r
 175                 cpi temp,200\r
 176                 brlo pro_sleep_s1\r
 177                 //leitung wieder high\r
 178 pro_sleep_s2:\r
 179                 owwh \r
 180                 ldi param,40\r
 181                 rcall wait_time\r
 182                 //Presents Impuls\r
 183                 sbi OW_DDR,OW_PIN\r
 184                 ldi param,130\r
 185                 rcall wait_time\r
 186                 cbi OW_DDR,OW_PIN\r
 187                 //init read byte\r
 188                 ldi bitp,0x01\r
 189                 ldi rwbyte,0\r
 190                 clr smode\r
 191                 ldi mode,OWM_READ_ROM_COMMAND\r
 192                 //Wait for all other devices presents impuls finished\r
 193                 ldi param,40\r
 194                 rcall wait_time\r
 195                 ret\r
 196 \r
 197 \r
 198 \r
 199 pro_hb:\r
 200                 ldi ZL,low(pro_stable) \r
 201                 ldi ZH,high(pro_stable) \r
 202                 add ZL,mode \r
 203                 adc ZH,zero\r
 204                 icall\r
 205                 ret\r
 206 \r
 207 pro_stable: \r
 208                 rjmp pro_read_rom_command\r
 209                 rjmp pro_sleep \r
 210                 rjmp pro_match_rom\r
 211                 rjmp pro_search_rom_s\r
 212                 rjmp pro_search_rom_r\r
 213                 rjmp pro_read_command\r
 214                 rjmp pro_write_scratchpad\r
 215                 rjmp pro_read_scratchpad\r
 216                 rjmp pro_programm_page\r
 217                 rjmp pro_recall_flash\r
 218 \r
 219 pro_read_rom_command:\r
 220                 ldi mode,OWM_SLEEP\r
 221                 cpi rwbyte,0xCC\r
 222                 brne pro_rcc_1\r
 223                 ldi mode,OWM_READ_COMMAND\r
 224                 rjmp pro_out_bitp1\r
 225 pro_rcc_1:\r
 226                 cpi rwbyte,0xF0 ;Searchrom\r
 227                 brne pro_rcc_2\r
 228                 ldi XL,low(sowid)  ;init sram pointer\r
 229                 ldi XH,high(sowid)\r
 230                 ld srbyte,X+\r
 231                 ldi bytep,0\r
 232                 rjmp pro_serchrom_next_bit\r
 233 pro_rcc_2:\r
 234                 cpi rwbyte,0x55 ;Matchrom\r
 235                 brne pro_rcc_3\r
 236 //              rcall pro_owidinit\r
 237                 ldi XL,low(sowid)  ;init sram pointer\r
 238                 ldi XH,high(sowid)\r
 239                 ldi mode,OWM_MATCH_ROM\r
 240                 rjmp pro_out_bytep0\r
 241 \r
 242 pro_rcc_3:\r
 243                 ret\r
 244 \r
 245 pro_match_rom:          \r
 246                 ld temp,X+\r
 247                 cp temp,rwbyte\r
 248                 breq pro_match_rom_next\r
 249                 ldi mode,OWM_SLEEP\r
 250                 ret\r
 251 pro_match_rom_next:                                     \r
 252                 cpi XL,SRAM_START+8\r
 253                 breq pro_match_rom_found\r
 254                 rjmp pro_out_bitp1\r
 255 pro_match_rom_found:\r
 256             ldi mode,OWM_READ_COMMAND\r
 257                 rjmp pro_out_bitp1\r
 258 \r
 259 pro_read_command:\r
 260                 ldi mode,OWM_SLEEP\r
 261                 cpi rwbyte,0x0F ;; Write to Scratchpad\r
 262                 brne pro_rc_1\r
 263                 ldi mode,OWM_WRITE_SCRATCHPAD\r
 264                 ldi XL,low(scratchpad)  ;init sram pointer\r
 265                 ldi XH,high(scratchpad)\r
 266                 rjmp pro_out_bytep0\r
 267 pro_rc_1:\r
 268                 cpi rwbyte,0xAA\r
 269                 brne pro_rc_2\r
 270                 ldi mode,OWM_READ_SCRATCHPAD  ;;Read from Scratchpad\r
 271                 ldi XL,low(scratchpad)  ;init sram pointer\r
 272                 ldi XH,high(scratchpad)\r
 273                 inc smode\r
 274                 ld rwbyte,X+\r
 275                 rjmp pro_out_bytep0\r
 276 \r
 277 pro_rc_2:\r
 278                 cpi rwbyte,0xB8\r
 279                 brne pro_rc_3\r
 280                 ldi mode,OWM_RECALL_FLASH  ;; copy Flash page in Scratchpad\r
 281                 ldi XL,low(scratchpad)  ;init sram pointer\r
 282                 ldi XH,high(scratchpad)\r
 283                 rjmp pro_out_bytep0\r
 284 pro_rc_3:\r
 285                 cpi rwbyte,0x55 ; copy Scratchpad to Flash\r
 286                 brne pro_rc_4\r
 287                 ldi mode,OWM_SLEEP\r
 288                 rjmp pro_programm_page\r
 289                 \r
 290 pro_rc_4:\r
 291                 cpi rwbyte,0x89 ; Reset Device /Boot (new) Firmware\r
 292                 brne pro_rc_5\r
 293                 rjmp jreset             \r
 294 pro_rc_5:\r
 295                 cpi rwbyte,0x8B ; Clear the OWID saved in EEPROM / one ID1\r
 296                 brne pro_rc_6   \r
 297                 ldi temp,7\r
 298 pro_rc_5a:\r
 299                 ldi XL,low(E2END)\r
 300                 ldi XH,high(E2END)\r
 301                 sub XL,temp\r
 302                 out EEARH,XH\r
 303                 out EEARL,XL\r
 304                 ldi temp, (0<<EEPM1)|(0<<EEPM0)\r
 305                 out EECR, temp\r
 306                 ldi temp,0xFF\r
 307                 out EEDR, temp\r
 308                 sbi EECR, EEMPE\r
 309                 sbi EECR, EEPE\r
 310                 ret\r
 311 \r
 312 \r
 313 pro_rc_6:\r
 314                 cpi rwbyte,0x8C ; Clear the OWID saved in EEPROM / one ID2\r
 315                 brne pro_rc_7\r
 316                 ldi temp,7+8\r
 317                 rjmp pro_rc_5a\r
 318 \r
 319 pro_rc_7:\r
 320                 ret\r
 321 \r
 322 pro_write_scratchpad:\r
 323                 st X+,rwbyte\r
 324                 cpi XL,SRAM_START+8+66\r
 325                 brlo pro_write_scratchpad_next\r
 326                 ldi mode,OWM_SLEEP\r
 327                 ret             \r
 328 pro_write_scratchpad_next:\r
 329                 ldi bitp,1\r
 330                 ret\r
 331 \r
 332 pro_read_scratchpad:\r
 333                 cpi XL,SRAM_START+8+66\r
 334                 brlo pro_read_scratchpad_next\r
 335                 ldi mode,OWM_SLEEP\r
 336                 clr smode\r
 337                 ret\r
 338 pro_read_scratchpad_next:\r
 339                 ld rwbyte,X+\r
 340                 rjmp pro_out_bitp1\r
 341 \r
 342 \r
 343 pro_programm_page:\r
 344 .equ PAGESIZEB = PAGESIZE*2;PAGESIZEB is page size in BYTES, not words\r
 345 // .org SMALLBOOTSTART\r
 346 write_page:\r
 347                 ;transfer data from RAM to Flash page buffer\r
 348                 ldi bytep, PAGESIZEB ;init loop variable\r
 349                 ldi YL,low(scratchpad)  ;init sram pointer\r
 350                 ldi YH,high(scratchpad)\r
 351                 ld ZL,Y+\r
 352                 ld ZH,Y+\r
 353                 ;page erase\r
 354                 ldi spmcrval, (1<<PGERS) + (1<<SPMEN)\r
 355                 rcall do_spm\r
 356 wrloop:\r
 357                 ld r0, Y+\r
 358                 ld r1, Y+\r
 359                 ldi spmcrval, (1<<SPMEN)\r
 360                 rcall do_spm\r
 361                 adiw ZH:ZL, 2\r
 362                 subi bytep, 2;use subi for PAGESIZEB<=256\r
 363                 brne wrloop\r
 364                 ;execute page write\r
 365                 subi ZL, low(PAGESIZEB) ;restore pointer\r
 366                 sbci ZH, high(PAGESIZEB) ;not required for PAGESIZEB<=256\r
 367                 ldi spmcrval, (1<<PGWRT) + (1<<SPMEN)\r
 368                 rcall do_spm\r
 369                 ;read back and check, optional\r
 370                 ldi bytep, PAGESIZEB\r
 371                 subi YL, low(PAGESIZEB) ;restore pointer\r
 372                 sbci YH, high(PAGESIZEB)\r
 373 rdloop:\r
 374                 lpm r0, Z+\r
 375                 ld r1, Y+\r
 376                 cpse r0, r1\r
 377                 rjmp error\r
 378                 subi bytep, 2;use subi for PAGESIZEB<=256\r
 379                 brne rdloop\r
 380                 ;return\r
 381                 ret\r
 382 do_spm:\r
 383                  ;input: spmcrval determines SPM action\r
 384                 ;disable interrupts if enabled, store status\r
 385                 in temp2, SREG\r
 386                 cli\r
 387                 ;check for previous SPM complete\r
 388 wait:\r
 389                 in temp, SPMCSR\r
 390                 sbrc temp, SPMEN\r
 391                 rjmp wait\r
 392                 ;SPM timed sequence\r
 393                 out SPMCSR, spmcrval\r
 394                 spm\r
 395                 ;restore SREG (to enable interrupts if originally enabled)\r
 396                 out SREG, temp2\r
 397                 ret\r
 398 \r
 399 error:\r
 400 \r
 401 \r
 402                 ret\r
 403 \r
 404 pro_recall_flash:\r
 405                 st X+,rwbyte\r
 406                 ;inc bytep\r
 407                 cpi XL,SRAM_START+8+2\r
 408                 brlo pro_out_bitp1;pro_recall_flash_next\r
 409                 lds ZL,scratchpad\r
 410                 lds ZH,scratchpad+1\r
 411 pro_recall_flash_cl:\r
 412                 lpm temp,Z+\r
 413                 st X+,temp\r
 414                 cpi XL,SRAM_START+8+66\r
 415                 brne pro_recall_flash_cl\r
 416                 ldi mode,OWM_SLEEP\r
 417                 ret\r
 418 \r
 419 pro_out_read_command:\r
 420                 ldi mode,OWM_READ_COMMAND\r
 421 pro_out_bytep0:\r
 422                 ldi bytep,0\r
 423 pro_out_bitp1:\r
 424                 ldi bitp,1\r
 425                 ret             \r
 426 \r
 427 \r
 428 \r
 429 pro_serchrom_next_bit:\r
 430                 mov rwbyte,srbyte\r
 431                 mov temp2,rwbyte\r
 432                 com rwbyte\r
 433                 ror temp2  ;first bit in C\r
 434                 rol rwbyte ;C in first bit \r
 435                 inc smode\r
 436                 ldi bitp,0x40\r
 437                 ldi mode,OWM_SEARCH_ROM_R  ;next mod Resive\r
 438                 ret\r
 439 \r
 440 \r
 441 pro_search_rom_s:\r
 442                 clr temp2\r
 443                 lsr srbyte ;shift in C lowest bit\r
 444                 ror temp2  ; shift in temp2 as highest bit\r
 445                 andi rwbyte,0x80  ;  clear other bits\r
 446                 eor temp2,rwbyte\r
 447                 breq pro_search_rom_s_goon\r
 448                 ldi mode,OWM_SLEEP\r
 449                 ret\r
 450 pro_search_rom_s_goon:\r
 451                 inc bytep\r
 452                 mov temp2,bytep\r
 453                 andi temp2,0x07\r
 454                 brne pro_serchrom_next_bit ;prepare next bit\r
 455                 mov temp2,bytep\r
 456                 andi temp2,0x40 ;;end\r
 457                 brne pro_search_rom_found\r
 458                 ;read next byte\r
 459                 ld srbyte,X+\r
 460                 rjmp pro_serchrom_next_bit\r
 461 \r
 462 pro_search_rom_found:\r
 463                 ldi mode,OWM_READ_COMMAND\r
 464                 rjmp pro_out_bytep0\r
 465 \r
 466 pro_search_rom_r:\r
 467                 clr smode\r
 468                 ldi mode,OWM_SEARCH_ROM_S\r
 469                 ldi bitp,0  ;go to searchrom_s after bit get\r
 470                 ret\r
 471 \r
 472 pro_owid: .DB  0xA3, 0xAA, 0x55, 0xAA, 0x55, 0xAA, 0x55, 0xFA\r
 473 \r
 474 \r
 475 \r
 476 \r
 477 \r
 478 wait_time:\r
 479                 out TCNT0,zero\r
 480 wait_time1:\r
 481                 in temp,TCNT0\r
 482                 cp temp,param\r
 483                 brlo wait_time1\r
 484                 ret\r
 485 \r
 486 \r
 487 .DSEG\r
 488 sowid: .BYTE 8\r
 489 scratchpad: .BYTE 66