programmer/programmer/programmer_4mhz.asm

   1 .def srbyte = r12  ;byty for search rom algorithm\r
   2 .def writelow = r13;  marker for send low\r
   3 .def zero =r14;  always zero \r
   4 .def smode=r15; if 1 then send \r
   5 .def temp = r16 ; \r
   6 .def temp2 = r17; \r
   7 .def mode = r18 ; \r
   8 .def bitp = r19 ; bit counter ... shift...\r
   9 .def rwbyte = r21;\r
  10 .def param = r22;\r
  11 .def bytep = r23  ;byte counter\r
  12 #define spmcrval  param\r
  13 \r
  14 \r
  15 .equ OWM_READ_ROM_COMMAND=0 ; 0 wegen schnellen test ist dieser wert 0! Daturch wird die Sprungdabelle nicht verwendet\r
  16 .equ OWM_SLEEP=1 ; Warten auf Reset\r
  17 .equ OWM_MATCH_ROM=2\r
  18 .equ OWM_SEARCH_ROM_S=3  ;send bit\r
  19 .equ OWM_SEARCH_ROM_R=4  ;resive master\r
  20 .equ OWM_READ_COMMAND=5\r
  21 .equ OWM_WRITE_SCRATCHPAD=6\r
  22 .equ OWM_READ_SCRATCHPAD=7\r
  23 .equ OWM_PROGRAMM_PAGE=8\r
  24 .equ OWM_RECALL_FLASH=9\r
  25 \r
  26 \r
  27 .equ OW_DDR = DDRB \r
  28 .equ OW_PIN = PORTB2\r
  29 .equ OW_PORT = PORTB \r
  30 .equ OW_PINN = PINB \r
  31 \r
  32 ;.equ SRAM_START = 0x60\r
  33 \r
  34 .macro set_clock\r
  35                 ldi temp,0x80;\r
  36                 out CLKPR,temp\r
  37                 ldi temp,@0\r
  38                 out CLKPR,temp\r
  39 .endmacro \r
  40 \r
  41 .macro owwl\r
  42                 sbic OW_PINN,OW_PIN\r
  43                 rjmp pc-1\r
  44 .endmacro \r
  45 \r
  46 .macro owwh\r
  47                 sbis OW_PINN,OW_PIN\r
  48                 rjmp pc-1\r
  49 .endmacro \r
  50 \r
  51 \r
  52 \r
  53 \r
  54  ;---------------------------------------------------\r
  55 ; START of PROG \r
  56 ;---------------------------------------------------\r
  57 \r
  58 \r
  59 .CSEG \r
  60 .ORG 0x000\r
  61 jreset:\r
  62                 rjmp start ; Reset-Vector \r
  63                 reti ; \r
  64                 reti ; \r
  65                 reti ; \r
  66                 reti ; \r
  67                 reti ; \r
  68                 reti ; \r
  69                 reti ; \r
  70                 reti ; \r
  71                 reti ; \r
  72                 reti ; \r
  73                 reti ; \r
  74                 reti ; \r
  75                 reti ; \r
  76                 reti ; \r
  77                 reti ; \r
  78                 reti ; \r
  79                 reti ; \r
  80                 reti ; \r
  81                 reti ; \r
  82                 reti ; \r
  83 \r
  84 \r
  85 .ORG 0x0EC0\r
  86 \r
  87 start: \r
  88                 cli\r
  89                 ldi temp,0\r
  90                 mov zero,temp\r
  91                 set_clock 0x01 ;4mhz\r
  92                 ldi mode,OWM_SLEEP\r
  93                 ldi temp,(1<<CS01) //2us\r
  94                 out TCCR0B,temp\r
  95                 ldi temp, HIGH(RAMEND) ; HIGH-Byte der obersten RAM-Adresse \r
  96                 out SPH, temp \r
  97                 ldi temp, LOW(RAMEND) ; LOW-Byte der obersten RAM-Adresse \r
  98                 out SPL, temp \r
  99                 ;ldi temp,1\r
 100                 ;out DDRB,temp\r
 101                 clr writelow\r
 102                 clr bitp\r
 103         \r
 104                 ;sbi PORTB,0\r
 105                 ldi ZL,low(pro_owid*2) \r
 106                 ldi ZH,high(pro_owid*2) \r
 107                 ldi XL,low(sowid)\r
 108                 ldi XH,high(sowid)\r
 109                 ;ldi temp2,8\r
 110 pro_copy_loop: ;copy ID on SRAM for better handling\r
 111                 lpm temp,Z+\r
 112                 st X+,temp\r
 113                 cpi XL,SRAM_START+8\r
 114                 brlo pro_copy_loop\r
 115 pro_loop:\r
 116                 ;sbi PORTB,0\r
 117                 owwl                            ;wait for line goes low (polling)\r
 118                 sbrc writelow,0         ;test of zero send\r
 119                 sbi OW_DDR,OW_PIN       ;yes pull line to low 2us faster\r
 120                 sbrs writelow,0     ;test egain 2us faster.....\r
 121                 rjmp pro_loop1          ;no ? goes next\r
 122                 ldi param,20            ;wait for 50 us\r
 123                 rcall wait_time\r
 124                 clr writelow            ;reset write low indecator\r
 125                 cbi OW_DDR,OW_PIN   ;release line\r
 126                 owwh                            ;wait for line is high (it can takes some time cause of the capacity of line)\r
 127 pro_loop1:\r
 128                 tst smode                       ;smode=1 for slave sends to master\r
 129                 breq pro_loop_resv\r
 130 pro_loop_send:\r
 131                 tst bitp\r
 132                 brne pro_loop_send1\r
 133                 rcall pro_hb\r
 134                 tst smode\r
 135                 breq pro_loop_end ; now reading ... do nothing \r
 136 pro_loop_send1:  ;prebare next bit\r
 137                 sbrs rwbyte ,0; if bit 0 set in rwbyte then skip next command\r
 138                 inc writelow\r
 139                 lsl bitp\r
 140                 ror rwbyte\r
 141                 rjmp pro_loop_end\r
 142 \r
 143 pro_loop_resv:\r
 144                 ldi param,7  ;wait 15us\r
 145                 rcall wait_time\r
 146                 lsr rwbyte\r
 147                 ;cbi PORTB,0\r
 148                 sbic OW_PINN,OW_PIN  ;test line\r
 149                 ori rwbyte,0x80\r
 150                 lsl bitp\r
 151                 brne pro_loop_end ;no handle need\r
 152                 rcall pro_hb\r
 153                 tst smode\r
 154                 brne pro_loop_send ; Nach dem Gelesen byte koennte gesendet werden muessen....\r
 155 pro_loop_end:\r
 156                 //owwh\r
 157                 out TCNT0,zero\r
 158 pro_loop_end_test_reset:\r
 159                 sbic OW_PINN,OW_PIN  //leitung wieder high\r
 160                 rjmp pro_loop\r
 161                 in temp,TCNT0\r
 162                 cpi temp,63\r
 163                 brlo pro_loop_end_test_reset\r
 164                 rcall pro_sleep_s2\r
 165                 rjmp pro_loop\r
 166 \r
 167 \r
 168 \r
 169 \r
 170 pro_sleep:\r
 171                 out TCNT0,zero\r
 172 pro_sleep_s1:\r
 173                 sbic OW_PINN,OW_PIN  //leitung wieder high\r
 174                 ret\r
 175                 in temp,TCNT0\r
 176                 cpi temp,100\r
 177                 brlo pro_sleep_s1\r
 178                 //leitung wieder high\r
 179 pro_sleep_s2:\r
 180                 owwh \r
 181                 ldi param,20\r
 182                 rcall wait_time\r
 183                 //Presents Impuls\r
 184                 sbi OW_DDR,OW_PIN\r
 185                 ldi param,75\r
 186                 rcall wait_time\r
 187                 cbi OW_DDR,OW_PIN\r
 188                 //init read byte\r
 189                 ldi bitp,0x01\r
 190                 ldi rwbyte,0\r
 191                 clr smode\r
 192                 ldi mode,OWM_READ_ROM_COMMAND\r
 193                 //Wait for all other devices presents impuls finished\r
 194                 ldi param,20\r
 195                 rcall wait_time\r
 196                 ret\r
 197 \r
 198 \r
 199 \r
 200 pro_hb:\r
 201                 ldi ZL,low(pro_stable) \r
 202                 ldi ZH,high(pro_stable) \r
 203                 add ZL,mode \r
 204                 adc ZH,zero\r
 205                 icall\r
 206                 ret\r
 207 \r
 208 pro_stable: \r
 209                 rjmp pro_read_rom_command\r
 210                 rjmp pro_sleep \r
 211                 rjmp pro_match_rom\r
 212                 rjmp pro_search_rom_s\r
 213                 rjmp pro_search_rom_r\r
 214                 rjmp pro_read_command\r
 215                 rjmp pro_write_scratchpad\r
 216                 rjmp pro_read_scratchpad\r
 217                 rjmp pro_programm_page\r
 218                 rjmp pro_recall_flash\r
 219 \r
 220 pro_read_rom_command:\r
 221                 ldi mode,OWM_SLEEP\r
 222                 cpi rwbyte,0xCC\r
 223                 brne pro_rcc_1\r
 224                 ldi mode,OWM_READ_COMMAND\r
 225                 rjmp pro_out_bitp1\r
 226 pro_rcc_1:\r
 227                 cpi rwbyte,0xF0 ;Searchrom\r
 228                 brne pro_rcc_2\r
 229                 ldi XL,low(sowid)  ;init sram pointer\r
 230                 ldi XH,high(sowid)\r
 231                 ld srbyte,X+\r
 232                 ldi bytep,0\r
 233                 rjmp pro_serchrom_next_bit\r
 234 pro_rcc_2:\r
 235                 cpi rwbyte,0x55 ;Matchrom\r
 236                 brne pro_rcc_3\r
 237 //              rcall pro_owidinit\r
 238                 ldi XL,low(sowid)  ;init sram pointer\r
 239                 ldi XH,high(sowid)\r
 240                 ldi mode,OWM_MATCH_ROM\r
 241                 rjmp pro_out_bytep0\r
 242 \r
 243 pro_rcc_3:\r
 244                 ret\r
 245 \r
 246 pro_match_rom:          \r
 247                 ld temp,X+\r
 248                 cp temp,rwbyte\r
 249                 breq pro_match_rom_next\r
 250                 ldi mode,OWM_SLEEP\r
 251                 ret\r
 252 pro_match_rom_next:                                     \r
 253                 cpi XL,SRAM_START+8\r
 254                 breq pro_match_rom_found\r
 255                 rjmp pro_out_bitp1\r
 256 pro_match_rom_found:\r
 257             ldi mode,OWM_READ_COMMAND\r
 258                 rjmp pro_out_bitp1\r
 259 \r
 260 pro_read_command:\r
 261                 ldi mode,OWM_SLEEP\r
 262                 cpi rwbyte,0x0F ;; Write to Scratchpad\r
 263                 brne pro_rc_1\r
 264                 ldi mode,OWM_WRITE_SCRATCHPAD\r
 265                 ldi XL,low(scratchpad)  ;init sram pointer\r
 266                 ldi XH,high(scratchpad)\r
 267                 rjmp pro_out_bytep0\r
 268 pro_rc_1:\r
 269                 cpi rwbyte,0xAA\r
 270                 brne pro_rc_2\r
 271                 ldi mode,OWM_READ_SCRATCHPAD  ;;Read from Scratchpad\r
 272                 ldi XL,low(scratchpad)  ;init sram pointer\r
 273                 ldi XH,high(scratchpad)\r
 274                 inc smode\r
 275                 ld rwbyte,X+\r
 276                 rjmp pro_out_bytep0\r
 277 \r
 278 pro_rc_2:\r
 279                 cpi rwbyte,0xB8\r
 280                 brne pro_rc_3\r
 281                 ldi mode,OWM_RECALL_FLASH  ;; copy Flash page in Scratchpad\r
 282                 ldi XL,low(scratchpad)  ;init sram pointer\r
 283                 ldi XH,high(scratchpad)\r
 284                 rjmp pro_out_bytep0\r
 285 pro_rc_3:\r
 286                 cpi rwbyte,0x55 ; copy Scratchpad to Flash\r
 287                 brne pro_rc_4\r
 288                 ldi mode,OWM_SLEEP\r
 289                 rjmp pro_programm_page\r
 290                 \r
 291 pro_rc_4:\r
 292                 cpi rwbyte,0x89 ; Reset Device /Boot (new) Firmware\r
 293                 brne pro_rc_5\r
 294                 rjmp jreset             \r
 295 pro_rc_5:\r
 296                 cpi rwbyte,0x8B ; Clear the OWID saved in EEPROM / one ID1\r
 297                 brne pro_rc_6   \r
 298                 ldi temp,7\r
 299 pro_rc_5a:\r
 300                 ldi XL,low(E2END)\r
 301                 ldi XH,high(E2END)\r
 302                 sub XL,temp\r
 303                 out EEARH,XH\r
 304                 out EEARL,XL\r
 305                 ldi temp, (0<<EEPM1)|(0<<EEPM0)\r
 306                 out EECR, temp\r
 307                 ldi temp,0xFF\r
 308                 out EEDR, temp\r
 309                 sbi EECR, EEMPE\r
 310                 sbi EECR, EEPE\r
 311                 ret\r
 312 \r
 313 \r
 314 pro_rc_6:\r
 315                 cpi rwbyte,0x8C ; Clear the OWID saved in EEPROM / one ID2\r
 316                 brne pro_rc_7\r
 317                 ldi temp,7+8\r
 318                 rjmp pro_rc_5a\r
 319 \r
 320 pro_rc_7:\r
 321                 ret\r
 322 \r
 323 pro_write_scratchpad:\r
 324                 st X+,rwbyte\r
 325                 cpi XL,SRAM_START+8+66\r
 326                 brlo pro_write_scratchpad_next\r
 327                 ldi mode,OWM_SLEEP\r
 328                 ret             \r
 329 pro_write_scratchpad_next:\r
 330                 ldi bitp,1\r
 331                 ret\r
 332 \r
 333 pro_read_scratchpad:\r
 334                 cpi XL,SRAM_START+8+66\r
 335                 brlo pro_read_scratchpad_next\r
 336                 ldi mode,OWM_SLEEP\r
 337                 clr smode\r
 338                 ret\r
 339 pro_read_scratchpad_next:\r
 340                 ld rwbyte,X+\r
 341                 rjmp pro_out_bitp1\r
 342 \r
 343 \r
 344 pro_programm_page:\r
 345 .equ PAGESIZEB = PAGESIZE*2;PAGESIZEB is page size in BYTES, not words\r
 346 // .org SMALLBOOTSTART\r
 347 write_page:\r
 348                 ;transfer data from RAM to Flash page buffer\r
 349                 ldi bytep, PAGESIZEB ;init loop variable\r
 350                 ldi YL,low(scratchpad)  ;init sram pointer\r
 351                 ldi YH,high(scratchpad)\r
 352                 ld ZL,Y+\r
 353                 ld ZH,Y+\r
 354                 ;page erase\r
 355                 ldi spmcrval, (1<<PGERS) + (1<<SPMEN)\r
 356                 rcall do_spm\r
 357 wrloop:\r
 358                 ld r0, Y+\r
 359                 ld r1, Y+\r
 360                 ldi spmcrval, (1<<SPMEN)\r
 361                 rcall do_spm\r
 362                 adiw ZH:ZL, 2\r
 363                 subi bytep, 2;use subi for PAGESIZEB<=256\r
 364                 brne wrloop\r
 365                 ;execute page write\r
 366                 subi ZL, low(PAGESIZEB) ;restore pointer\r
 367                 sbci ZH, high(PAGESIZEB) ;not required for PAGESIZEB<=256\r
 368                 ldi spmcrval, (1<<PGWRT) + (1<<SPMEN)\r
 369                 rcall do_spm\r
 370                 ;read back and check, optional\r
 371                 ldi bytep, PAGESIZEB\r
 372                 subi YL, low(PAGESIZEB) ;restore pointer\r
 373                 sbci YH, high(PAGESIZEB)\r
 374 rdloop:\r
 375                 lpm r0, Z+\r
 376                 ld r1, Y+\r
 377                 cpse r0, r1\r
 378                 rjmp error\r
 379                 subi bytep, 2;use subi for PAGESIZEB<=256\r
 380                 brne rdloop\r
 381                 ;return\r
 382                 ret\r
 383 do_spm:\r
 384                  ;input: spmcrval determines SPM action\r
 385                 ;disable interrupts if enabled, store status\r
 386                 in temp2, SREG\r
 387                 cli\r
 388                 ;check for previous SPM complete\r
 389 wait:\r
 390                 in temp, SPMCSR\r
 391                 sbrc temp, SPMEN\r
 392                 rjmp wait\r
 393                 ;SPM timed sequence\r
 394                 out SPMCSR, spmcrval\r
 395                 spm\r
 396                 ;restore SREG (to enable interrupts if originally enabled)\r
 397                 out SREG, temp2\r
 398                 ret\r
 399 \r
 400 error:\r
 401 \r
 402 \r
 403                 ret\r
 404 \r
 405 pro_recall_flash:\r
 406                 st X+,rwbyte\r
 407                 ;inc bytep\r
 408                 cpi XL,SRAM_START+8+2\r
 409                 brlo pro_out_bitp1;pro_recall_flash_next\r
 410                 lds ZL,scratchpad\r
 411                 lds ZH,scratchpad+1\r
 412 pro_recall_flash_cl:\r
 413                 lpm temp,Z+\r
 414                 st X+,temp\r
 415                 cpi XL,SRAM_START+8+66\r
 416                 brne pro_recall_flash_cl\r
 417                 ldi mode,OWM_SLEEP\r
 418                 ret\r
 419 \r
 420 pro_out_read_command:\r
 421                 ldi mode,OWM_READ_COMMAND\r
 422 pro_out_bytep0:\r
 423                 ldi bytep,0\r
 424 pro_out_bitp1:\r
 425                 ldi bitp,1\r
 426                 ret             \r
 427 \r
 428 \r
 429 \r
 430 pro_serchrom_next_bit:\r
 431                 mov rwbyte,srbyte\r
 432                 mov temp2,rwbyte\r
 433                 com rwbyte\r
 434                 ror temp2  ;first bit in C\r
 435                 rol rwbyte ;C in first bit \r
 436                 inc smode\r
 437                 ldi bitp,0x40\r
 438                 ldi mode,OWM_SEARCH_ROM_R  ;next mod Resive\r
 439                 ret\r
 440 \r
 441 \r
 442 pro_search_rom_s:\r
 443                 clr temp2\r
 444                 lsr srbyte ;shift in C lowest bit\r
 445                 ror temp2  ; shift in temp2 as highest bit\r
 446                 andi rwbyte,0x80  ;  clear other bits\r
 447                 eor temp2,rwbyte\r
 448                 breq pro_search_rom_s_goon\r
 449                 ldi mode,OWM_SLEEP\r
 450                 ret\r
 451 pro_search_rom_s_goon:\r
 452                 inc bytep\r
 453                 mov temp2,bytep\r
 454                 andi temp2,0x07\r
 455                 brne pro_serchrom_next_bit ;prepare next bit\r
 456                 mov temp2,bytep\r
 457                 andi temp2,0x40 ;;end\r
 458                 brne pro_search_rom_found\r
 459                 ;read next byte\r
 460                 ld srbyte,X+\r
 461                 rjmp pro_serchrom_next_bit\r
 462 \r
 463 pro_search_rom_found:\r
 464                 ldi mode,OWM_READ_COMMAND\r
 465                 rjmp pro_out_bytep0\r
 466 \r
 467 pro_search_rom_r:\r
 468                 clr smode\r
 469                 ldi mode,OWM_SEARCH_ROM_S\r
 470                 ldi bitp,0  ;go to searchrom_s after bit get\r
 471                 ret\r
 472 \r
 473 pro_owid: .DB  0xA3, 0xAA, 0x55, 0xAA, 0x55, 0xAA, 0x55, 0xFA\r
 474 \r
 475 \r
 476 \r
 477 \r
 478 \r
 479 wait_time:\r
 480                 out TCNT0,zero\r
 481 wait_time1:\r
 482                 in temp,TCNT0\r
 483                 cp temp,param\r
 484                 brlo wait_time1\r
 485                 ret\r
 486 \r
 487 \r
 488 .DSEG\r
 489 sowid: .BYTE 8\r
 490 scratchpad: .BYTE 66