a44b62b4a8d45ea93a11f412e957bea212b6e88c
[owSlave2.git] / DS2423_DS2413 / DS2423_DS2413.c
1 // Copyright (c) 2017, Tobias Mueller tm(at)tm3d.de\r
2 // All rights reserved.\r
3 //\r
4 // Redistribution and use in source and binary forms, with or without\r
5 // modification, are permitted provided that the following conditions are\r
6 // met:\r
7 //\r
8 //  * Redistributions of source code must retain the above copyright\r
9 //    notice, this list of conditions and the following disclaimer.\r
10 //  * Redistributions in binary form must reproduce the above copyright\r
11 //    notice, this list of conditions and the following disclaimer in the\r
12 //    documentation and/or other materials provided with the\r
13 //    distribution.\r
14 //  * All advertising materials mentioning features or use of this\r
15 //    software must display the following acknowledgement: This product\r
16 //    includes software developed by tm3d.de and its contributors.\r
17 //  * Neither the name of tm3d.de nor the names of its contributors may\r
18 //    be used to endorse or promote products derived from this software\r
19 //    without specific prior written permission.\r
20 //\r
21 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\r
22 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\r
23 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
24 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT\r
25 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,\r
26 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\r
27 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
28 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
29 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\r
30 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\r
31 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
32 \r
33 //!!!!!Max Program size 7551 Byte\r
34 #define _CPULLUP_\r
35 #define F_CPU 8000000UL\r
36 #include <avr/io.h>\r
37 #include <avr/interrupt.h>\r
38 #include <util/delay.h>  \r
39 #include <avr/wdt.h>\r
40 #include <avr/sleep.h>\r
41 #include <avr/pgmspace.h>\r
42 \r
43 extern void OWINIT(void);\r
44 extern void EXTERN_SLEEP(void);\r
45 #define FHEM_PLATINE\r
46 \r
47 volatile uint8_t owid1[8]={0x1D, 0x1D, 0xDA, 0x84, 0x00, 0x00, 0x05, 0xD9};/**/\r
48 volatile uint8_t owid2[8]={0x3A, 0x3A, 0xDA, 0x84, 0x00, 0x00, 0x05, 0xB6};/**/\r
49 uint8_t config_info1[26]={9,13,9,13,9,13,9,13,0x02,19,19,19,19,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}; //+2 for CRC\r
50 uint8_t config_info2[26]={0,0,0,0,0,0,0,0,0x02,0,0,0,0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}; //+2 for CRC\r
51         \r
52 #if (owid>128) \r
53 #error "Variable not correct"\r
54 #endif\r
55 \r
56 extern uint8_t mode;\r
57 extern uint8_t gcontrol;\r
58 extern uint8_t reset_indicator;\r
59 \r
60 \r
61 uint8_t pin_state;\r
62 uint8_t pin_set;\r
63 \r
64 \r
65 typedef union {\r
66         volatile uint8_t bytes[45];\r
67         struct {\r
68                 uint16_t addr;\r
69                 uint8_t status;\r
70                 uint8_t scratch[32];//3\r
71                 uint32_t counter;  //35\r
72                 uint32_t zero;   //39\r
73                 uint16_t crc;  //43\r
74         };\r
75 } counterpack_t;\r
76 counterpack_t pack1;\r
77 \r
78 \r
79 \r
80 volatile uint8_t lastcps;\r
81 typedef union {\r
82         uint32_t c32[4];\r
83         uint8_t c8[16];\r
84 } counters_t;\r
85 \r
86 volatile counters_t counters1;\r
87 \r
88 \r
89 volatile uint8_t istat;\r
90 volatile uint8_t changefromeeprom;\r
91 \r
92 #if  defined(__AVR_ATtiny44__)  || defined(__AVR_ATtiny84__) || defined(__AVR_ATtiny24A__)||defined(__AVR_ATtiny44A__)  || defined(__AVR_ATtiny84A__)\r
93 #define PCINT_VECTOR PCINT0_vect\r
94 #define PIN_REG PINA\r
95 #define PIN_DDR DDRA\r
96 \r
97 #ifdef FHEM_PLATINE\r
98 #define PIN_CH3 (1<<PINA2)\r
99 #define PIN_CH2 (1<<PINA1)\r
100 #define PIN_PIOA (1<<PINA3)\r
101 #define PIN_PIOB (1<<PINA4)\r
102 //LEDS\r#define LPIN_CH2 (1<<PINB0)\r#define LDD_CH2 DDRB\r#define LPORT_CH2 PORTB\r#define LPIN_CH3 (1<<PINA5)\r#define LDD_CH3 DDRA\r#define LPORT_CH3 PORTA\r#define LPIN_CH0 (1<<PINA7)\r#define LDD_CH0 DDRA\r#define LPORT_CH0 PORTA\r#define LPIN_CH1 (1<<PINB1)\r#define LDD_CH1 DDRB\r#define LPORT_CH1 PORTB\r
103 \r
104 #define LED2_ON LPORT_CH2|=LPIN_CH2;\r
105 #else\r
106 #define LED2_ON\r
107 #define PIN_CH2 (1<<PINA4)\r
108 #define PIN_CH3 (1<<PINA5)\r
109 #define PIN_PIOA (1<<PINA6)\r
110 #define PIN_PIOB (1<<PINA7)\r
111 #endif\r
112 \r
113 #define TEST_TIMER  ((TIMSK0 & (1<<TOIE0))==0)\r
114 \r
115 \r
116 #endif\r
117 \r
118 \r
119 ISR(PCINT0_vect) {\r
120         if (((PIN_REG&PIN_CH2)==0)&&((istat&PIN_CH2)==PIN_CH2)) {       counters1.c32[2]++;     LED2_ON}\r
121         if (((PIN_REG&PIN_CH3)==0)&&((istat&PIN_CH3)==PIN_CH3)) {       counters1.c32[3]++;LED2_ON      }\r
122         if ((PIN_REG&PIN_PIOA)==0)      pin_state&=~0x1; else pin_state|=0x01;\r
123         if ((PIN_REG&PIN_PIOB)==0)      pin_state&=~0x4; else pin_state|=0x04;\r
124         //Reset Switch on the FHEM_BOARD\r
125         #ifdef FHEM_PLATINE  //clear counter\r
126         if ((((PINA&(1<<PINA6)))==0)&&((istat&(1<<PINA6))==(1<<PINA6)))   {\r            _delay_ms(100);\r                if (((PINA&(1<<PINA6)))==0) {\r                  LPORT_CH3|=LPIN_CH3;\r                   _delay_ms(100);\r                        counters1.c32[2]=0;\r                    counters1.c32[3]=0;\r                    //count Resets\r                 counters1.c32[0]++;\r                    LPORT_CH3&=~LPIN_CH3;\r          }\r              GIFR|=(1<<PCIF0);\r      }\r      #endif\r\r
127         istat=PIN_REG;\r
128         changefromeeprom=1;\r
129 }\r
130 \r
131 \r
132 ISR(ANA_COMP_vect) {\r
133         if (changefromeeprom==0) return;\r
134         if ((ACSR&(1<<ACO))!=0) {\r
135                 _delay_ms(5);\r
136                 if ((ACSR&(1<<ACO))!=0) {\r
137                         counters1.c32[1]++;\r                    CLKPR=0x80;//Switch to 4 MHz\r
138                         CLKPR=01;\r
139                         \r
140                         PORTB|=(1<<PINB1);\r
141                         EEARH=0;\r
142                         for(uint8_t i=0;i<16;i++) {\r
143                                 uint8_t addr=i;\r
144                                 while(EECR & (1<<EEPE));\r
145                                 EECR = (0<<EEPM1)|(0<<EEPM0);\r
146                                 EEARL = i;\r
147                                 EEDR = counters1.c8[addr];\r
148                                 EECR |= (1<<EEMPE);\r
149                                 EECR |= (1<<EEPE);\r
150                         }\r
151                         changefromeeprom=0;\r
152                         PORTB&=~(1<<PINB1);\r
153                         CLKPR=0x80;\r
154                         CLKPR=0;\r
155 #ifdef FHEM_PLATINE\r
156                         LPORT_CH1|=LPIN_CH1;\r
157 #endif\r
158                         GIFR|=(1<<INTF0);\r
159                 }\r
160         }\r
161         \r
162 }\r
163 \r
164 \r
165 int main(void){\r
166         #ifdef FHEM_PLATINE\r
167         PRR|=(1<<PRUSI);  //Switch off usi, dont switch of ADC cause Multiplexer is used for the correct AIN1 pin\r
168         #else\r
169         PRR|=(1<<PRUSI)|(1<<PRADC);  //Switch off usi and adc for save Power\r
170         #endif\r
171         OWINIT();\r
172         \r
173         pack1.zero=0;\r
174         counters1.c32[0]=0;\r
175         counters1.c32[2]=0;\r
176         counters1.c32[1]=0;\r
177         counters1.c32[3]=0;\r
178         \r
179         changefromeeprom=1;\r
180         #if  defined(__AVR_ATtiny44__)  || defined(__AVR_ATtiny84__) || defined(__AVR_ATtiny24A__)||defined(__AVR_ATtiny44A__)  || defined(__AVR_ATtiny84A__)\r
181 \r
182         PORTB|=0xFF-(1<<PINB2); //Make PullUp an all Pins but not OW_PIN\r
183         PORTA|=0xFF;\r
184 \r
185         #ifndef _CPULLUP_  // pullup\r
186         PORTA&=~(PIN_PIOA|PIN_PIOB);\r
187         PORTA&=~(PIN_CH2|PIN_CH3);\r
188         #endif\r
189 \r
190         #ifdef FHEM_PLATINE  //LEDs\r
191         LDD_CH0|=LPIN_CH0;\r     LPORT_CH0&=~LPIN_CH0;\r  LDD_CH1|=LPIN_CH1;\r     LPORT_CH1&=~LPIN_CH1;\r  LDD_CH2|=LPIN_CH2;\r     LPORT_CH2&=~LPIN_CH2;\r  LDD_CH3|=LPIN_CH3;\r     LPORT_CH3&=~LPIN_CH3;\r
192         #endif\r
193 \r
194         GIMSK|=(1<<PCIE0);\r
195         PCMSK0=(PIN_PIOA|PIN_PIOB|PIN_CH2|PIN_CH3); //Nicht ganz korrekt aber die Bits liegen gleich\r
196 \r
197         \r
198         \r
199         istat=PINA;\r
200         #endif\r
201 \r
202         EEARH=0;\r
203         uint8_t addr;\r
204         for(uint8_t i=0;i<16;i++) {\r
205                 addr=i;\r
206                 while(EECR & (1<<EEPE));\r
207                 EEARL=i;\r
208                 EECR |= (1<<EERE);\r
209                 counters1.c8[addr]=EEDR;\r
210         }\r
211         changefromeeprom=0;  //Daten neu eingelesen\r
212         for (uint8_t i=0;i<4;i++) {\r
213                 if (counters1.c32[i]==0xFFFFFFFF) {\r
214                         counters1.c32[i]=0;\r
215                         changefromeeprom=1;  //Daten geaendert\r
216                 }\r
217                 //counters.c32[i]=0;\r
218         }\r
219 \r
220         //ACSR|=(1<<ACD);  //Disable Comparator\r
221         ADCSRB|=(1<<ACME); //Disable Analog multiplexer\r
222         MCUCR &=~(1<<PUD); //All Pins Pullup...\r
223 #ifdef FHEM_PLATINE\r
224         DIDR0|=(1<<ADC0D);\r
225         PORTA&=~(1<<PINA0);//Disable Pullup\r
226 #else\r
227         DIDR0|=(1<<ADC2D)|(1<<ADC1D); // Disable Digital input on Analog AIN0/AIN1  (PINA1 / PINA2)\r
228         PORTA&=~(1<<PINA2); //AIN1\r
229 #endif\r
230         ACSR&=~(1<<ACD);\r
231         ACSR|=(1<<ACIE)|(1<<ACIS1)|(1<<ACIS0)|(1<<ACBG); //Enabble comperator interrupt Rising edge....(1<<ACIS0) -> minus of Comperator falls down -> output of Comperator rises\r
232 #ifdef FHEM_PLATINE\r
233         //Switch std AIN1 to A0\r
234         ADCSRA&=~(1<<ADEN);\r
235         ADCSRB=(1<<ACME);\r
236         ADMUX=0;\r
237         //Taster\r
238         DDRA&=~(1<<PINA6);\r     PCMSK0|=(1<<PCINT6);\r   PORTA|=(1<<PINA6); //Pullup\r
239 \r
240 \r
241         LPORT_CH0|=LPIN_CH0;\r   _delay_ms(500);\r        LPORT_CH0&=~LPIN_CH0;\r
242 #endif\r
243         pin_state=0x0F;\r
244         sei();\r
245         while(1)   {\r
246 \r
247                 if (pin_set&1) {\r
248                         counters1.c32[3]=0;\r
249                         pin_set&=~1;\r
250                         changefromeeprom=1;\r
251                 }\r
252                 if (pin_set&2) {\r
253                         counters1.c32[2]=0;\r
254                         pin_set&=~2;\r
255                         changefromeeprom=1;\r
256                 }\r
257                 /*if (counters1.c32[2]==0) {\r
258                         pin_state|=2;\r
259                 } else pin_state&=~2;\r
260                 if (counters1.c32[3]==0) {\r
261                         pin_state|=8;\r
262                 } else pin_state&=~8;*/\r
263 \r
264 #ifdef FHEM_PLATINE\r
265                 if (LPORT_CH2&LPIN_CH2) {\r                      _delay_ms(50);\r                 LPORT_CH2&=~LPIN_CH2;\r          }\r
266                 if (LPORT_CH1&LPIN_CH1) {\r                      _delay_ms(50);\r                 LPORT_CH1&=~LPIN_CH1;\r          }\r
267 #endif\r
268 #ifndef FHEM_PLATINE\r
269                 if ((PINB&(1<<PORTB0))==0) {  //Jumper gesetzt ->Ruecksetzen\r
270                         for (uint8_t i=2;i<4;i++) {\r
271                                 counters1.c32[i]=0;\r
272                         }\r
273                         //count Resets\r                 counters1.c32[0]++;\r                    changefromeeprom=1;\r
274                 }\r
275 #endif\r
276                 MCUCR|=(1<<SE);\r
277                 MCUCR&=~(1<<SM1);\r
278                 asm("SLEEP");\r
279         }\r
280 \r
281 \r
282 }\r
283 \r