Many changes from 2018
[owSlave2.git] / DS2450_ADC_JOE2 / DS2450.c
1 \r
2 // Copyright (c) 2017, Tobias Mueller tm(at)tm3d.de\r
3 // All rights reserved.\r
4 //\r
5 // Redistribution and use in source and binary forms, with or without\r
6 // modification, are permitted provided that the following conditions are\r
7 // met:\r
8 //\r
9 //  * Redistributions of source code must retain the above copyright\r
10 //    notice, this list of conditions and the following disclaimer.\r
11 //  * Redistributions in binary form must reproduce the above copyright\r
12 //    notice, this list of conditions and the following disclaimer in the\r
13 //    documentation and/or other materials provided with the\r
14 //    distribution.\r
15 //  * All advertising materials mentioning features or use of this\r
16 //    software must display the following acknowledgement: This product\r
17 //    includes software developed by tm3d.de and its contributors.\r
18 //  * Neither the name of tm3d.de nor the names of its contributors may\r
19 //    be used to endorse or promote products derived from this software\r
20 //    without specific prior written permission.\r
21 //\r
22 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\r
23 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\r
24 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
25 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT\r
26 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,\r
27 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\r
28 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
29 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
30 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\r
31 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\r
32 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
33 \r
34 #define F_CPU 8000000UL\r
35 #include <avr/io.h>\r
36 #include <avr/interrupt.h>\r
37 #include <util/delay.h>\r
38 #include <avr/wdt.h>\r
39 #include <avr/sleep.h>\r
40 #include <avr/pgmspace.h>\r
41 #include "../common/owSlave_tools.h"\r
42 \r
43 \r
44 OWST_EXTERN_VARS\r
45 \r
46 uint8_t owid[8]={0x20, 0xA2, 0xD9, 0x84, 0x00, 0x16, 0x02, 0x5D};/**/\r
47 uint8_t config_info[26]={0x06,0x09,0x06,9,0x06,9,0x06,9,0x02,20,20,20,20,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00};\r
48 \r
49 OWST_WDT_ISR\r
50 \r
51 \r
52 typedef union {\r
53         volatile uint8_t bytes[0x20];\r
54         struct {\r
55                 //Page0\r
56                 uint16_t A;  //0\r
57                 uint16_t B;  //2\r
58                 uint16_t C;  //4\r
59                 uint16_t D;  //6\r
60                 //Page1\r
61                 uint8_t CSA1;\r
62                 uint8_t CSA2;\r
63                 uint8_t CSB1;\r
64                 uint8_t CSB2;\r
65                 uint8_t CSC1;\r
66                 uint8_t CSC2;\r
67                 uint8_t CSD1;\r
68                 uint8_t CSD2;\r
69                 //Page2\r
70                 uint8_t LA;\r
71                 uint8_t HA;\r
72                 uint8_t LB;\r
73                 uint8_t HB;\r
74                 uint8_t LC;\r
75                 uint8_t HC;\r
76                 uint8_t LD;\r
77                 uint8_t HD;\r
78                 //Page3\r
79                 uint8_t FC1;\r
80                 uint8_t FC2;\r
81                 uint8_t FC3;\r
82                 uint8_t FC4;\r
83                 uint8_t VCCP;\r
84                 uint8_t FC5;\r
85                 uint8_t FC6;\r
86                 uint8_t FC7;\r
87                 uint8_t convc1;\r
88                 uint8_t convc2;\r
89                 \r
90                 \r
91         };\r
92 } pack_t;\r
93 volatile pack_t pack;\r
94 \r
95 OWST_ADC_CONF16_FUNC\r
96 OWST_ADC_CONF16_OSS_FUNC\r
97 OWST_TESTSW\r
98 \r
99 #define LPIN_CH2 (1<<PINB1)\r#define LDD_CH2 DDRB\r#define LPORT_CH2 PORTB\r#define LED2_ON LPORT_CH2&=~LPIN_CH2;\r
100 #define LED2_OFF LPORT_CH2|=LPIN_CH2;\r
101 \r
102 int main(void){\r
103         pack.A=0;\r
104         pack.B=0;\r
105         pack.C=0;\r
106         pack.D=0;\r
107         pack.CSA1=0x08;\r
108         pack.CSA2=0x8C;\r
109         pack.CSB1=0x08;\r
110         pack.CSB2=0x8C;\r
111         pack.CSC1=0x08;\r
112         pack.CSC2=0x8C;\r
113         pack.CSD1=0x08;\r
114         pack.CSD2=0x8C;\r
115         pack.HA=0xFF;\r
116         pack.LA=0x00;\r
117         pack.HB=0xFF;\r
118         pack.LB=0x00;\r
119         pack.HC=0xFF;\r
120         pack.LC=0x00;\r
121         pack.HD=0xFF;\r
122         pack.LD=0x00;\r
123         pack.VCCP=0;\r
124         OWST_INIT_ADC_ON\r
125         OWINIT();\r
126 \r
127         OWST_WDR_CONFIG8\r
128         gcontrol=1;\r
129         OWST_INIT_ADC\r
130         AD_DDR&=~(1<<PINA4);\r
131         AD_PORT&=~(1<<PINA4);\r
132         AD_DDR&=~(1<<PINA5);\r
133         AD_PORT&=~(1<<PINA5);\r
134         AD_DDR&=~(1<<PINA6);\r
135         AD_PORT&=~(1<<PINA6);\r
136         AD_DDR&=~(1<<PINA7);\r
137         AD_PORT&=~(1<<PINA7);\r
138         DIDR0|=((1<<ADC4D)|(1<<ADC5D)|(1<<ADC6D)|(1<<ADC7D));\r
139         sei();\r
140         wdcounter=5;\r
141         //DDRB|=(1<<PINB1);\r
142         LDD_CH2 |=LPIN_CH2;\r
143         volatile double VCC;\r
144         volatile double VAD_A,VAD_B,VAD_C,VAD_D;\r
145     while(1)   {\r
146                 if (wdcounter>3) {\r
147                         LED2_ON\r
148                         wdcounter=0;\r
149                         ADMUX=OWST_ADCIN_REFINT;\r
150                         _delay_us(100);\r
151                         VCC=owst_ADC_runf();\r
152                         VCC=(1.079*65472.0)/VCC;\r
153                         //if (VCC>5.1) VCC=5.1;\r
154                         //VAD=VCC*65535.0/5.1;\r
155                         //if (VAD>65535) VAD=65535;\r
156                         if (testSW()) {  //Zwei differential Eingaenge\r
157                                 VAD_C=0;\r
158                                 ADMUX=0b0011010; //ADC4 + ADC5 - Gain 1\r
159                                 _delay_us(100);\r
160                                 VAD_A=owst_ADC_runf();\r
161                                 if (VAD_A<3100) {\r
162                                         ADMUX=0b0011011; //ADC0 + ADC1 - Gain 20\r
163                                         _delay_us(100);\r
164                                         VAD_A=owst_ADC_runf();\r
165                                         VAD_A=VCC/20.0*VAD_A/65472.0;\r
166                                         //VAD_A=VCC/20.0;\r
167                                         VAD_C+=12850;\r
168                                 } else {\r
169                                         VAD_A=owst_ADC_OSS_runf();\r
170                                         VAD_A=VCC*VAD_A/65472.0;\r
171                                         VAD_C+=0;\r
172                                 }\r
173                                 if (pack.CSA2&0x01) VAD_A=VAD_A*65535.0/5.1; else VAD_A=VAD_A*65535.0/2.55;\r
174                                 if (VAD_A>65535) VAD_A=65535;\r
175                                 ///_------------------------ B---------------------\r
176                                 ADMUX=0b011110; //ADC6 + ADC7 - Gain 1\r
177                                 _delay_us(100);\r
178                                 VAD_B=owst_ADC_runf();\r
179                                 if (VAD_B<3100) {\r
180                                         ADMUX=0b011111; //ADC6 + ADC7 - Gain 20\r
181                                         _delay_us(100);\r
182                                         VAD_B=owst_ADC_runf();\r
183                                         VAD_B=VCC/20.0*VAD_B/65472.0;\r
184                                         //VAD_B=VAD_B20.0;\r
185                                         VAD_C+=12850*2;\r
186                                 } else {\r
187                                         VAD_B=owst_ADC_OSS_runf();\r
188                                         VAD_B=VCC*VAD_B/65472.0;\r
189                                         VAD_C+=0;\r
190                                 }\r
191                                 if (pack.CSB2&0x01) VAD_B=VAD_B*65535.0/5.1; else VAD_B=VAD_B*65535.0/2.55;\r
192                                 //VAD_B=VAD_B*65535.0/5.1;\r
193                                 if (VAD_B>65535) VAD_B=65535;\r
194                                 VAD_D=VCC*65535.0/5.1;\r
195                                 if (VAD_D>65535) VAD_D=65535;\r
196 \r
197                         } else { // 4 Eingaenge gegen Masse\r
198                                 ADMUX=OWST_ADCIN_PA4;\r
199                                 _delay_us(100);\r
200                                 VAD_A=owst_ADC_OSS_runf();\r
201                                 VAD_A=VCC*VAD_A/65472.0;\r
202                                 if (pack.CSA2&0x01) VAD_A=VAD_A*65535.0/5.1; else VAD_A=VAD_A*65535.0/2.55;\r
203                                 if (VAD_A>65535) VAD_A=65535;\r
204 \r
205                                 ADMUX=OWST_ADCIN_PA5;\r
206                                 _delay_us(100);\r
207                                 VAD_B=owst_ADC_OSS_runf();\r
208                                 VAD_B=VCC*VAD_B/65472.0;\r
209                                 if (pack.CSB2&0x01) VAD_B=VAD_B*65535.0/5.1; else VAD_B=VAD_B*65535.0/2.55;\r
210                                 if (VAD_B>65535) VAD_B=65535;\r
211 \r
212                                 ADMUX=OWST_ADCIN_PA6;\r
213                                 _delay_us(100);\r
214                                 VAD_C=owst_ADC_OSS_runf();\r
215                                 VAD_C=VCC*VAD_C/65472.0;\r
216                                 if (pack.CSC2&0x01) VAD_C=VAD_C*65535.0/5.1; else VAD_C=VAD_C*65535.0/2.55;\r
217                                 if (VAD_C>65535) VAD_C=65535;\r
218 \r
219                                 ADMUX=OWST_ADCIN_PA7;\r
220                                 _delay_us(100);\r
221                                 VAD_D=owst_ADC_OSS_runf();\r
222                                 VAD_D=VCC*VAD_D/65472.0;\r
223                                 if (pack.CSD2&0x01) VAD_D=VAD_D*65535.0/5.1; else VAD_D=VAD_D*65535.0/2.55;\r
224                                 if (VAD_D>65535) VAD_D=65535;\r
225                         }\r
226                         LED2_OFF\r
227 \r
228 \r
229                 }\r
230 \r
231                 if (gcontrol) {\r
232                         //PORTB|=(1<<PINB1);\r
233                         uint8_t bb=1;\r
234                         uint8_t bb1=1;\r
235                         for(uint8_t i=0;i<4;i++){ //Initialisieren mit 0 oder FF oder letzter Wert\r
236                                 if (pack.convc1&bb1) {\r
237                                         if (pack.convc2&(bb)) {pack.bytes[i*2]=0;pack.bytes[i*2+1]=0;}\r
238                                         bb=bb<<1;\r
239                                         if (pack.convc2&(bb)) {pack.bytes[i*2]=0xFF;pack.bytes[i*2+1]=0xFF;}\r
240                                         bb=bb<<1;\r
241                                 } else bb=bb<<2;\r
242                                 bb1=bb1<<1;                             \r
243                         }\r
244                         //CHanel A\r
245                         if (pack.convc1&1) {\r
246                                 //if (pack.CSA2&0x01)   ADMUX=0; else ADMUX=0x80;\r
247                                 cli();pack.A=VAD_A;sei();\r
248                                 alarmflag=0;\r
249                                 if (pack.CSA2&0x08)  //AEH\r
250                                         if (pack.bytes[1]>pack.HA) {alarmflag=1;pack.CSA2|=0x20;}\r
251                                 if (pack.CSA2&0x04)  //AEL\r
252                                         if (pack.bytes[1]<pack.LA) {alarmflag=1;pack.CSA2|=0x10;}\r
253                         }\r
254 \r
255                         if (pack.convc1&2) {\r
256                                 //if (pack.CSB2&0x01)   ADMUX=1; else ADMUX=0x81;\r
257                                 cli();pack.B=VAD_B;sei();\r
258                                 if (pack.CSB2&0x08)  //AEH\r
259                                         if (pack.bytes[1]>pack.HB) {alarmflag=1;pack.CSB2|=0x20;}\r
260                                 if (pack.CSB2&0x04)  //AEL\r
261                                         if (pack.bytes[1]<pack.LB) {alarmflag=1;pack.CSB2|=0x10;}\r
262                         }\r
263 \r
264                         if (pack.convc1&4) {\r
265                                 //if (pack.CSC2&0x01)   ADMUX=2; else ADMUX=0x82;\r
266                                 cli();pack.C=VAD_C;sei();\r
267                                 if (pack.CSC2&0x08)  //AEH\r
268                                         if (pack.bytes[1]>pack.HC) {alarmflag=1;pack.CSC2|=0x20;}\r
269                                 if (pack.CSC2&0x04)  //AEL\r
270                                         if (pack.bytes[1]<pack.LC) {alarmflag=1;pack.CSC2|=0x10;}\r
271                         } \r
272                         if (pack.convc1&8) {\r
273                                 cli();pack.D=VAD_D;sei();\r
274                                 if (pack.CSD2&0x08)  //AEH\r
275                                         if (pack.bytes[1]>pack.HD) {alarmflag=1;pack.CSD2|=0x20;}\r
276                                 if (pack.CSD2&0x04)  //AEL\r
277                                         if (pack.bytes[1]<pack.LD) {alarmflag=1;pack.CSD2|=0x10;}\r
278                         }\r
279                         \r
280                         EXTERN_SLEEP();\r
281                         //PORTB&=~(1<<PINB1);\r
282                 }\r
283 \r
284                 uint8_t bb=1;\r
285                 for(volatile uint8_t i=0;i<4;i++) {\r
286                         if (pack.bytes[8+i*2]&0x80) {  //Chanel as output\r
287                                 if (pack.bytes[8+i*2]&0x40) {\r
288                                 //      AD_DDR|=bb;\r
289                                 } else {\r
290                                         cli();\r
291                                 //      AD_DDR&=~bb;\r
292                                         sei();\r
293                                 }\r
294                         } else {\r
295                                 cli();\r
296                         //      AD_DDR&=~bb;\r
297                                 sei();\r
298                         }\r
299                         bb=bb*2;\r
300                 }\r
301                 OWST_MAIN_END \r
302    }\r
303 \r
304 \r
305 }