-
-// Copyright (c) 2015, Tobias Mueller tm(at)tm3d.de
-// All rights reserved.
-//
-// Redistribution and use in source and binary forms, with or without
-// modification, are permitted provided that the following conditions are
-// met:
-//
-// * Redistributions of source code must retain the above copyright
-// notice, this list of conditions and the following disclaimer.
-// * Redistributions in binary form must reproduce the above copyright
-// notice, this list of conditions and the following disclaimer in the
-// documentation and/or other materials provided with the
-// distribution.
-// * All advertising materials mentioning features or use of this
-// software must display the following acknowledgement: This product
-// includes software developed by tm3d.de and its contributors.
-// * Neither the name of tm3d.de nor the names of its contributors may
-// be used to endorse or promote products derived from this software
-// without specific prior written permission.
-//
-// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-
-#define _CHANGEABLE_ID_
-#define _ZERO_POLLING_
-
-#include "../common/OWConfig.s"
-#include "../common/OWCRC8.s"
-
-.extern pack,8
-
-//.extern am2302_temp,2
-
-
-
-.macro CHIP_INIT
-Init_EEPROM_read:
- sbic _SFR_IO_ADDR(EECR), EEPE
- rjmp Init_EEPROM_read
- ldi r_temp,0
- out _SFR_IO_ADDR(EEARH), r_temp
- ldi r_temp,2
- out _SFR_IO_ADDR(EEARL), r_temp
- sbi _SFR_IO_ADDR(EECR), EERE
- in r_temp,_SFR_IO_ADDR(EEDR)
- sbrs r_temp,7
- rcall hrc_recall_eeprom_func
-.endm
-
-.macro COMMAND_TABLE
- rjmp h_readscratchpad
- rjmp h_writescratchpad
- rjmp h_convert_run
-.endm
-
-#include "../common/OWRomFunctions.s"
-#include "../common/OWTimerInterrupt.s"
-
-
-
-; Ab hier Geraeteabhaenging
-#define OW_READ_SCRATCHPAD OW_FIRST_COMMAND+0
-#define OW_WRITE_SCRATCHPAD OW_FIRST_COMMAND+1
-#define OW_CONVERT_RUN OW_FIRST_COMMAND+2
-
-
-;---------------------------------------------------
-; READ COMMAND and start operation
-;---------------------------------------------------
-
-
-h_readcommand:
- clr r_bytep
-#ifndef _DIS_FLASH_
- FLASH_COMMANDS ; muss zu erst sein....
-#endif
- cjmp 0xBE,hrc_set_readscratchpad
- cjmp 0x4E,hrc_set_writescratchpad
- cjmp 0x44,hrc_set_convertT
- cjmp 0x48,hrc_copy_scratchpad
- cjmp 0xB8,hrc_recall_eeprom
- FW_CONFIG_INFO
-#ifdef _CHANGEABLE_ID_
- CHANGE_ID_COMMANDS
-#endif
- //ldi r_mode,OW_SLEEP
- rjmp handle_end_sleep
-
-hrc_set_readscratchpad:
- ldi r_mode,OW_READ_SCRATCHPAD
- ldi r_sendflag,1
- CRCInit2
- rjmp h_readscratchpad
-
-hrc_set_writescratchpad:
- ldi r_mode,OW_WRITE_SCRATCHPAD
- ldi r_bytep,2 ;start to write in 2
- rjmp handle_end
-
-hrc_recall_eeprom:
- rcall hrc_recall_eeprom_func
- rjmp handle_end
-
-
-
-hrc_set_convertT:
- ldi r_temp,1
- sts gcontrol,r_temp
- ldi r_mode,OW_CONVERT_RUN
- ldi r_sendflag,3 ;set bit 0 and 1 for no zero polling
-h_convert_run:
- ldi r_bcount,0
- ldi r_rwbyte,0
- rjmp handle_end_no_bcount
-
-hrc_copy_scratchpad:
- ldi r_bytep,2
- configZ pack,r_bytep
- clr r_bytep
-hrc_copy_scratchpad_EEPROM_write:
- sbic _SFR_IO_ADDR(EECR), EEPE
- rjmp hrc_copy_scratchpad_EEPROM_write
- ldi r_temp, (0<<EEPM1)|(0<<EEPM0)
- out _SFR_IO_ADDR(EECR), r_temp
- ldi r_temp,0
- out _SFR_IO_ADDR(EEARH),r_temp
- out _SFR_IO_ADDR(EEARL), r_bytep
- ld r_rwbyte,Z+
- out _SFR_IO_ADDR(EEDR), r_rwbyte
- sbi _SFR_IO_ADDR(EECR), EEMPE
- sbi _SFR_IO_ADDR(EECR), EEPE
- inc r_bytep
- cpi r_bytep,3
- brne hrc_copy_scratchpad_EEPROM_write
- rjmp handle_end
-
-
-hrc_recall_eeprom_func:
- ldi r_bytep,2
- configZ pack,r_bytep
- clr r_bytep
- clr r_temp
-hrc_recall_eeprom_EEPROM_read:
- sbic _SFR_IO_ADDR(EECR), EEPE
- rjmp hrc_recall_eeprom_EEPROM_read
- out _SFR_IO_ADDR(EEARH), r_temp
- out _SFR_IO_ADDR(EEARL), r_bytep
- sbi _SFR_IO_ADDR(EECR), EERE
- in r_rwbyte,_SFR_IO_ADDR(EEDR)
- st Z+,r_rwbyte
- inc r_bytep
- cpi r_bytep,3
- brne hrc_recall_eeprom_EEPROM_read
- ret
-
-
-
-
-
-
-;---------------------------------------------------
-; READ SCRATCHPAD
-;---------------------------------------------------
-
-h_readscratchpad:
- cpi r_bytep,8
- breq h_readscratchpad_crc
- cpi r_bytep,9
- breq h_readscratchpad_all
- configZ pack,r_bytep
- ld r_rwbyte,Z
- rjmp h_readscratchpad_endc
-h_readscratchpad_crc:
- lds r_rwbyte,crc
-h_readscratchpad_endc:
- inc r_bytep
- ldi r_bcount,1
- rjmp handle_end
-h_readscratchpad_all:
- rjmp handle_end_sleep
-
-
-
-
-
-;---------------------------------------------------
-; WRITE SCRATCHPAD
-;---------------------------------------------------
-
-h_writescratchpad:
- configZ pack,r_bytep
- inc r_bytep
- cpi r_bytep,5
- breq h_writescratchpad_all
- st Z,r_rwbyte
- rjmp handle_end
-h_writescratchpad_all:
- ori r_rwbyte,0x1F ; Alle unteren Bits sind immer 1
- st Z,r_rwbyte
- rjmp handle_end_sleep
-
-
-
-
-
-#include "../common/OWPinInterrupt.s"
+\r
+// Copyright (c) 2015, Tobias Mueller tm(at)tm3d.de\r
+// All rights reserved. \r
+// \r
+// Redistribution and use in source and binary forms, with or without \r
+// modification, are permitted provided that the following conditions are \r
+// met: \r
+// \r
+// * Redistributions of source code must retain the above copyright \r
+// notice, this list of conditions and the following disclaimer. \r
+// * Redistributions in binary form must reproduce the above copyright \r
+// notice, this list of conditions and the following disclaimer in the \r
+// documentation and/or other materials provided with the \r
+// distribution. \r
+// * All advertising materials mentioning features or use of this \r
+// software must display the following acknowledgement: This product \r
+// includes software developed by tm3d.de and its contributors. \r
+// * Neither the name of tm3d.de nor the names of its contributors may \r
+// be used to endorse or promote products derived from this software \r
+// without specific prior written permission. \r
+// \r
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
+// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
+// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR \r
+// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT \r
+// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, \r
+// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT \r
+// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, \r
+// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY \r
+// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT \r
+// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE \r
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. \r
+\r
+#define _CHANGEABLE_ID_\r
+#define _ZERO_POLLING_\r
+\r
+#include "../common/OWConfig.s"\r
+#include "../common/OWCRC8.s"\r
+\r
+.extern pack,8\r
+\r
+//.extern am2302_temp,2\r
+\r
+\r
+\r
+.macro CHIP_INIT \r
+Init_EEPROM_read:\r
+ sbic _SFR_IO_ADDR(EECR), EEPE\r
+ rjmp Init_EEPROM_read\r
+ ldi r_temp,0\r
+ out _SFR_IO_ADDR(EEARH), r_temp\r
+ ldi r_temp,2\r
+ out _SFR_IO_ADDR(EEARL), r_temp\r
+ sbi _SFR_IO_ADDR(EECR), EERE\r
+ in r_temp,_SFR_IO_ADDR(EEDR)\r
+ sbrs r_temp,7\r
+ rcall hrc_recall_eeprom_func\r
+.endm\r
+\r
+.macro COMMAND_TABLE\r
+ rjmp h_readscratchpad\r
+ rjmp h_writescratchpad\r
+ rjmp h_convert_run\r
+.endm\r
+\r
+#include "../common/OWRomFunctions.s"\r
+#include "../common/OWTimerInterrupt.s"\r
+\r
+\r
+\r
+; Ab hier Geraeteabhaenging\r
+#define OW_READ_SCRATCHPAD OW_FIRST_COMMAND+0\r
+#define OW_WRITE_SCRATCHPAD OW_FIRST_COMMAND+1\r
+#define OW_CONVERT_RUN OW_FIRST_COMMAND+2\r
+\r
+\r
+;---------------------------------------------------\r
+; READ COMMAND and start operation\r
+;---------------------------------------------------\r
+\r
+\r
+h_readcommand:\r
+ clr r_bytep\r
+#ifndef _DIS_FLASH_\r
+ FLASH_COMMANDS ; muss zu erst sein....\r
+#endif\r
+ cjmp 0xBE,hrc_set_readscratchpad\r
+ cjmp 0x4E,hrc_set_writescratchpad\r
+ cjmp 0x44,hrc_set_convertT\r
+ cjmp 0x48,hrc_copy_scratchpad\r
+ cjmp 0xB8,hrc_recall_eeprom\r
+ FW_CONFIG_INFO\r
+#ifdef _CHANGEABLE_ID_\r
+ CHANGE_ID_COMMANDS\r
+#endif\r
+ //ldi r_mode,OW_SLEEP\r
+ rjmp handle_end_sleep\r
+\r
+hrc_set_readscratchpad:\r
+ ldi r_mode,OW_READ_SCRATCHPAD\r
+ ldi r_sendflag,1\r
+ CRCInit2\r
+ rjmp h_readscratchpad\r
+\r
+hrc_set_writescratchpad:\r
+ ldi r_mode,OW_WRITE_SCRATCHPAD\r
+ ldi r_bytep,2 ;start to write in 2\r
+ rjmp handle_end\r
+\r
+hrc_recall_eeprom:\r
+ rcall hrc_recall_eeprom_func\r
+ rjmp handle_end\r
+\r
+\r
+\r
+hrc_set_convertT:\r
+ ldi r_temp,1\r
+ sts gcontrol,r_temp\r
+ ldi r_mode,OW_CONVERT_RUN\r
+ ldi r_sendflag,3 ;set bit 0 and 1 for no zero polling\r
+h_convert_run:\r
+ ldi r_bcount,0\r
+ ldi r_rwbyte,0\r
+ rjmp handle_end_no_bcount \r
+\r
+hrc_copy_scratchpad:\r
+ ldi r_bytep,2\r
+ configZ pack,r_bytep\r
+ clr r_bytep\r
+hrc_copy_scratchpad_EEPROM_write:\r
+ sbic _SFR_IO_ADDR(EECR), EEPE \r
+ rjmp hrc_copy_scratchpad_EEPROM_write\r
+ ldi r_temp, (0<<EEPM1)|(0<<EEPM0)\r
+ out _SFR_IO_ADDR(EECR), r_temp\r
+ ldi r_temp,0\r
+ out _SFR_IO_ADDR(EEARH),r_temp\r
+ out _SFR_IO_ADDR(EEARL), r_bytep\r
+ ld r_rwbyte,Z+\r
+ out _SFR_IO_ADDR(EEDR), r_rwbyte\r
+ sbi _SFR_IO_ADDR(EECR), EEMPE\r
+ sbi _SFR_IO_ADDR(EECR), EEPE\r
+ inc r_bytep\r
+ cpi r_bytep,3\r
+ brne hrc_copy_scratchpad_EEPROM_write\r
+ rjmp handle_end\r
+\r
+\r
+hrc_recall_eeprom_func:\r
+ ldi r_bytep,2\r
+ configZ pack,r_bytep\r
+ clr r_bytep\r
+ clr r_temp\r
+hrc_recall_eeprom_EEPROM_read:\r
+ sbic _SFR_IO_ADDR(EECR), EEPE\r
+ rjmp hrc_recall_eeprom_EEPROM_read\r
+ out _SFR_IO_ADDR(EEARH), r_temp\r
+ out _SFR_IO_ADDR(EEARL), r_bytep\r
+ sbi _SFR_IO_ADDR(EECR), EERE\r
+ in r_rwbyte,_SFR_IO_ADDR(EEDR)\r
+ st Z+,r_rwbyte\r
+ inc r_bytep\r
+ cpi r_bytep,3\r
+ brne hrc_recall_eeprom_EEPROM_read\r
+ ret\r
+\r
+\r
+\r
+\r
+\r
+\r
+;---------------------------------------------------\r
+; READ SCRATCHPAD\r
+;---------------------------------------------------\r
+\r
+h_readscratchpad:\r
+ cpi r_bytep,8\r
+ breq h_readscratchpad_crc\r
+ cpi r_bytep,9\r
+ breq h_readscratchpad_all\r
+ configZ pack,r_bytep\r
+ ld r_rwbyte,Z\r
+ rjmp h_readscratchpad_endc\r
+h_readscratchpad_crc:\r
+ lds r_rwbyte,crc\r
+h_readscratchpad_endc:\r
+ inc r_bytep\r
+ ldi r_bcount,1 \r
+ rjmp handle_end\r
+h_readscratchpad_all:\r
+ rjmp handle_end_sleep\r
+\r
+\r
+\r
+\r
+\r
+;---------------------------------------------------\r
+; WRITE SCRATCHPAD\r
+;---------------------------------------------------\r
+\r
+h_writescratchpad:\r
+ configZ pack,r_bytep\r
+ inc r_bytep\r
+ cpi r_bytep,5\r
+ breq h_writescratchpad_all\r
+ st Z,r_rwbyte\r
+ rjmp handle_end\r
+h_writescratchpad_all:\r
+ ori r_rwbyte,0x1F ; Alle unteren Bits sind immer 1\r
+ st Z,r_rwbyte\r
+ rjmp handle_end_sleep\r
+\r
+\r
+\r
+\r
+\r
+#include "../common/OWPinInterrupt.s"\r
.end
\ No newline at end of file
tm3d / owSlave2.git / blobdiff