Many changes from 2018

[owSlave2.git] / common / OWRomFunctionsDual.s

diff --git a/common/OWRomFunctionsDual.s b/common/OWRomFunctionsDual.s
index 3c2d152..d4d13d5 100644 (file)
--- a/common/OWRomFunctionsDual.s
+++ b/common/OWRomFunctionsDual.s
@@ -105,7 +105,7 @@
        cljmp 0x85,hrc_fw_configinfo2\r
 .endm\r
 \r
-#ifdef _CHANGEABLE_ID_\r
+//#ifdef _CHANGEABLE_ID_ //--> ID vom EEPROM lesen auch wenn sie sich nicht ändern laesst\r
 ; lesen der ID aus dem EEPROM beim Start\r
 read_EEPROM_ID1:  \r
        ldi r_temp2,lo8(E2END)\r
@@ -139,7 +139,7 @@ read_EEPROM_ID_loop:
        brne read_EEPROM_ID_loop\r
 read_EEPROM_ID_end:\r
        ret\r
-#endif\r
+//#endif\r
 \r
 \r
 \r
@@ -187,11 +187,7 @@ hrc_jmp_flasher:
        lds r_temp,flashmarker\r
        cpi r_temp,2\r
        brne hrc_jmp_flasher_inc\r
-       ldi r_temp,0xC0\r
-       push r_temp\r
-       ldi r_temp,0x0E\r
-       push r_temp\r
-       ret ; Direkter Sprung zum Bootloader\r
+       JMP_FLASHER\r
 hrc_jmp_flasher_inc:\r
        inc r_temp\r
        sts flashmarker,r_temp\r
@@ -213,13 +209,13 @@ hrc_set_searchrom:
        rjmp h_searchrom_next_bit\r
 \r
 hrc_start_read_command: ;Skip rom und Matchrom ok...\r
+       CRCInit1\r
        lds r_temp,srbyte\r
        cpi r_temp,1\r
        breq hrc_start_read_command1\r
        cpi r_temp,2\r
        breq hrc_start_read_command2\r
        rjmp handle_end_sleep\r
-       CRCInit1\r
 hrc_start_read_command1:\r
        ldi r_mode,OW_READ_COMMAND1\r
        rjmp handle_end\r
@@ -241,17 +237,24 @@ hrc_set_alarm_search:
        rjmp handle_end_sleep\r
 \r
 hrc_fw_configinfo1:\r
+#ifdef _NO_CONFIGBYTES_\r
+       rjmp handle_end_sleep\r
+#else\r
        ldi r_mode,OW_FWCONFIGINFO1\r
        ldi r_sendflag,1\r
        CRCInit2\r
        rjmp h_fwconfiginfo1\r
+#endif\r
 \r
 hrc_fw_configinfo2:\r
+#ifdef _NO_CONFIGBYTES_\r
+       rjmp handle_end_sleep\r
+#else\r
        ldi r_mode,OW_FWCONFIGINFO2\r
        ldi r_sendflag,1\r
        CRCInit2\r
        rjmp h_fwconfiginfo2\r
-\r
+#endif\r
 \r
 ;---------------------------------------------------\r
 ;   MATCH ROM\r
@@ -395,15 +398,31 @@ h_searchromr:  ; stelle um auf empfangen
 ;---------------------------------------------------\r
 \r
 h_fwconfiginfo1:\r
+#ifdef _NO_CONFIGBYTES_\r
+h_fwconfiginfo2:\r
+       rjmp handle_end_sleep\r
+#else\r
        configZ config_info1,r_bytep\r
        rjmp h_fwconfiginfo_go\r
 h_fwconfiginfo2:\r
        configZ config_info2,r_bytep\r
+/*#ifdef _CRC16_\r
+       cpi  r_bytep,24\r
+       breq h_fwconfiginfo_crc\r
+       cpi  r_bytep,26\r
+       breq h_fwconfiginfo_all\r
+//h_fwconfiginfo_end:\r
+       //configZ config_info1,r_bytep  //crc16 wird in config_info1 gespeichert, auch bei config_info2 \r
+       configZ config_info2,r_bytep\r
+       ld   r_rwbyte,Z\r
+       rjmp handle_end_inc\r
+#endif\r
+*/\r
 \r
 h_fwconfiginfo_go:\r
        cpi  r_bytep,24\r
        breq h_fwconfiginfo_crc\r
-#ifdef _CRC8_\r
+#if defined(_CRC8_)  || defined( _CRC8_16_) \r
        cpi  r_bytep,25\r
        breq h_fwconfiginfo_all\r
 #elif defined _CRC16_\r
@@ -414,8 +433,10 @@ h_fwconfiginfo_go:
        breq h_fwconfiginfo_all\r
 #warning No CRC known code implemented\r
 #endif\r
+\r
 h_fwconfiginfo_end:\r
        //configZ config_info1,r_bytep  //crc16 wird in config_info1 gespeichert, auch bei config_info2 \r
+       //configZ config_info1,r_bytep\r
        ld   r_rwbyte,Z\r
        rjmp handle_end_inc\r
 h_fwconfiginfo_crc:\r
@@ -429,11 +450,15 @@ h_fwconfiginfo_crc:
        lds r_temp,crc+1\r
        com r_temp\r
        sts config_info1+25,r_temp\r
-       rjmp h_fwconfiginfo_end\r
+       ldi r_mode,OW_FWCONFIGINFO1  //auch CRC vom Dev 2 wird in Configinfo 1 geschrieben also da weiter machen\r
+       configZ config_info1,r_bytep\r
+       ld   r_rwbyte,Z\r
+       rjmp handle_end_inc\r
+\r
 #endif\r
 h_fwconfiginfo_all:\r
        rjmp handle_end_sleep\r
-\r
+#endif\r
 \r
 ;---------------------------------------------------\r
 ;   CHANGE ROM FUNCTIONS\r
@@ -554,32 +579,11 @@ spause:
 .global OWINIT\r
 OWINIT:\r
        \r
-#ifndef _DIS_FLASH_\r
 ; check for bootloader jumper\r
        ;vor allen anderen Registerconfigs\r
        push r_temp\r
-\r
-       ldi r_temp,(1<<PUD) ;enable pullup \r
-       out _SFR_IO_ADDR(MCUCR) ,r_temp\r
-       sbi _SFR_IO_ADDR(PORTA),PINA5 ;internal pullup on PINA5\r
-       sbi _SFR_IO_ADDR(PORTA),PINA4 ;internal pullup on PINA4\r
-       rcall spause\r
-       sbis _SFR_IO_ADDR(PINA),PINA5\r
-       rjmp owinit_botest_end  ;PinA5 nicht auf 1\r
-       sbis _SFR_IO_ADDR(PINA),PINA4\r
-       rjmp owinit_botest_end ;PinA4 nicht auf 1\r
-       cbi _SFR_IO_ADDR(PORTA),PINA4 \r
-       sbi _SFR_IO_ADDR(DDRA),PINA4  ;PINA4 AUSGANG und 0\r
-       rcall spause\r
-       sbic _SFR_IO_ADDR(PINA),PINA5 \r
-       rjmp owinit_botest_end ;PINA5 nicht 0.... nicht verbunden\r
-       cbi _SFR_IO_ADDR(DDRA),PINA4\r
-       ldi r_temp,0xC0\r
-       push r_temp\r
-       ldi r_temp,0x0E\r
-       push r_temp\r
-       ret ; Direkter Sprung zum Bootloader*/\r
-owinit_botest_end:\r
+#ifndef _DIS_FLASH_\r
+       CHECK_BOOTLOADER_PIN \r
 #endif\r
        HW_INIT  //Microcontroller specific\r
        CHIP_INIT //1-Wire device specific\r
@@ -591,10 +595,10 @@ init_idtable:
        push r_rwbyte\r
        push r_idn1\r
        push r_idn2\r
-#ifdef _CHANGEABLE_ID_\r
+//#ifdef _CHANGEABLE_ID_\r
        rcall read_EEPROM_ID1\r
        rcall read_EEPROM_ID2\r
-#endif\r
+//#endif\r
        ldi r_bytep,8\r
        ldi r_temp,0\r
        ldi  zl,lo8(idtable)\r
@@ -635,6 +639,7 @@ owinit_odgen2:
        dec r_bytep\r
        brne owinit_odgen1\r
        ;copy ids in config bytes\r
+#ifndef _NO_CONFIGBYTES_\r
        ldi  xl,lo8(owid1)\r
        ldi  xh,hi8(owid1)\r
        ldi      yl,lo8(config_info2+17)\r
@@ -655,7 +660,7 @@ owinit_cpconfig2:
        st Y+,r_rwbyte\r
        dec r_temp\r
        brne owinit_cpconfig2\r
-\r
+#endif\r
 \r
        ldi r_temp,0\r
        sts mode,r_temp\r