X-Git-Url: https://git.smho.de/gw/?p=owSlave2.git;a=blobdiff_plain;f=DS2450%2FDS2450.c;h=0e922559e6200a1c5751773b6aca001c886ad4d8;hp=cf4e588a5ecd3b4a759f9d8c04620143b3768611;hb=refs%2Fheads%2Fmaster;hpb=a6a04f58e4afd20f206fdf4a8a7b3ce4062f1b67

diff --git a/DS2450/DS2450.c b/DS2450/DS2450.c
index cf4e588..0e92255 100644
--- a/DS2450/DS2450.c
+++ b/DS2450/DS2450.c
@@ -1,5 +1,5 @@
 
-// Copyright (c) 2015, Tobias Mueller tm(at)tm3d.de
+// Copyright (c) 2017, Tobias Mueller tm(at)tm3d.de
 // All rights reserved.
 //
 // Redistribution and use in source and binary forms, with or without
@@ -38,23 +38,37 @@
 #include <avr/wdt.h>
 #include <avr/sleep.h>
 #include <avr/pgmspace.h>
+#include "../common/I2C/TWI_Master.h"
 
 extern void OWINIT();
 extern void EXTERN_SLEEP();
 
 uint8_t owid[8]={0x20, 0xA2, 0xD9, 0x84, 0x00, 0x16, 0x02, 0x5D};/**/
-uint8_t config_info[16]={0x06,0x09,0x06,0x09,0x06,0x09,0x06,0x09,0x02,0x00,0x00,0x00,0x00,0x00,0x00,0x00};
+uint8_t config_info[26]={0x06,0x09,0x06,0x09,0x06,0x09,0x06,0x09,0x02,20,20,20,20,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00};
 
 #if (owid>128) 
 #error "Variable not correct"
 #endif
 
-extern uint8_t mode;
+extern volatile uint8_t mode;
 extern uint8_t gcontrol;
 extern uint8_t reset_indicator;
 extern uint8_t alarmflag;
 
 
+
+#if  defined(__AVR_ATtiny24__)||defined(__AVR_ATtiny44__)  || defined(__AVR_ATtiny84__) || defined(__AVR_ATtiny24A__)||defined(__AVR_ATtiny44A__)  || defined(__AVR_ATtiny84A__)
+ISR(WATCHDOG_vect) {
+	#else
+	ISR(WDT_vect) {
+	// mode=0;
+		#endif
+	//wdcounter++;
+			if (reset_indicator==1) reset_indicator++;
+		else if (reset_indicator==2) mode=0;
+	}
+
+
 typedef union {
 	volatile uint8_t bytes[0x20];
 	struct {
@@ -99,8 +113,15 @@ typedef union {
 volatile pack_t pack;
 
 
+#if  defined(__AVR_ATtiny24__)||defined(__AVR_ATtiny44__)  || defined(__AVR_ATtiny84__)||defined(__AVR_ATtiny24A__)||defined(__AVR_ATtiny44A__)  || defined(__AVR_ATtiny84A__)
+#define AD_PORT PORTA
+#define AD_DDR DDRA
+#endif
 
-
+#if  defined(__AVR_ATmega168__)||defined(__AVR_ATmega168A__) ||defined(__AVR_ATmega328__) ||defined(__AVR_ATmega328P__) ||defined(__AVR_ATmega328PB__) 
+#define AD_PORT PORTC
+#define AD_DDR DDRC
+#endif
 
 
 int main(void){
@@ -125,15 +146,31 @@ int main(void){
 	pack.HD=0xFF;
 	pack.LD=0x00;
 	pack.VCCP=0;
-	OWINIT();
+	 MCUCR &=~(1<<PUD); //All Pins Pullup...
+	 MCUCR |=(1<<BODS);
+	 MCUSR=0;
+
 
+
+	OWINIT();
+	DDRC=0xFF;
+	DDRB=0xFF;
+	DDRD=0xFF-(1<<PIND2);
+	PORTB=0xFF;
+	PORTC=0xFF;
+	PORTD=0xFF-(1<<PIND2);
+	PRR=0xCF;
+		
 	MCUCR &=~(1<<PUD); //All Pins Pullup...
-	MCUCR |=(1<<BODS);
-	PORTA&=~((1<<PINA0)|(1<<PINA1)|(1<<PINA2)|(1<<PINA3));
-	ADCSRA=(1<<ADEN)|(1<ADPS0)|(1<<ADPS2);
+	//MCUCR |=(1<<BODS);
+	//PORTA&=~((1<<PINA0)|(1<<PINA1)|(1<<PINA2)|(1<<PINA3));
+
+	//ADCSRA=(1<<ADEN)|(1<ADPS0)|(1<<ADPS2);
 
 	
-	
+		WDTCSR |= (1<<WDCE) |(1<<WDE);   // Enable the WD Change Bit//| (1<<WDE)
+		WDTCSR  =   (1<<WDIE) |              // Enable WDT Interrupt
+		(1<<WDP2) | (1<<WDP0);   // Set Timeout to ~8 seconds
 	gcontrol=1;
 	ADCSRB|=(1<<ADLAR); 
 	sei();
@@ -210,34 +247,53 @@ int main(void){
 		}
 
 		uint8_t bb=1;
-		for(uint8_t i=0;i<4;i++) {
+		for(volatile uint8_t i=0;i<4;i++) {
 			if (pack.bytes[8+i*2]&0x80) {  //Chanel as output
 				if (pack.bytes[8+i*2]&0x40) {
-					DDRA|=bb;
+				//	AD_DDR|=bb;
 				} else {
-					DDRA&=~bb;
+					cli();
+				//	AD_DDR&=~bb;
+					sei();
 				}
 			} else {
-				DDRA&=~bb;
+				cli();
+			//	AD_DDR&=~bb;
+				sei();
 			}
 			bb=bb*2;
 		}
 		
+
+#if defined(__AVR_ATmega168__)||defined(__AVR_ATmega168A__)  ||defined(__AVR_ATmega328__) ||defined(__AVR_ATmega328P__) ||defined(__AVR_ATmega328PB__) 
+	if (((TIMSK0 & (1<<TOIE0))==0)&& (mode==0)){
+	//if ( mode==0){
+		SMCR|=(1<<SE)|(1<<SM1);
+		EICRA&=~(1<<ISC01);
+	} else {
+		SMCR|=(1<<SE);
+		SMCR&=~(1<<SM1);
+	}
+	asm("SLEEP");
+#else
+
 #if  defined(__AVR_ATtiny25__)||defined(__AVR_ATtiny45__)  || defined(__AVR_ATtiny85__)
 			if (((TIMSK & (1<<TOIE0))==0)&& (mode==0))
 #endif			
-#if  defined(__AVR_ATtiny24__)||defined(__AVR_ATtiny44__)  || defined(__AVR_ATtiny84__) ||defined(__AVR_ATtiny24A__)||defined(__AVR_ATtiny44A__)  || defined(__AVR_ATtiny84A__)
+#if  defined(__AVR_ATtiny24__)||defined(__AVR_ATtiny44__)  || defined(__AVR_ATtiny84__) ||defined(__AVR_ATtiny24A__)||defined(__AVR_ATtiny44A__)  || defined(__AVR_ATtiny84A__) 
 			if (((TIMSK0 & (1<<TOIE0))==0)&& (mode==0))
 #endif
 			  {
 
 			MCUCR|=(1<<SE)|(1<<SM1);
+			MCUCR&=~(1<<SM0);
 			MCUCR&=~(1<<ISC01);
 		} else {
 			MCUCR|=(1<<SE);
 			MCUCR&=~(1<<SM1);
 		}
-	//	asm("SLEEP");
+		asm("SLEEP");
+#endif
    }