2 // Copyright (c) 2017, Tobias Mueller tm(at)tm3d.de
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3 // All rights reserved.
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5 // Redistribution and use in source and binary forms, with or without
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6 // modification, are permitted provided that the following conditions are
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9 // * Redistributions of source code must retain the above copyright
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10 // notice, this list of conditions and the following disclaimer.
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11 // * Redistributions in binary form must reproduce the above copyright
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12 // notice, this list of conditions and the following disclaimer in the
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13 // documentation and/or other materials provided with the
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15 // * All advertising materials mentioning features or use of this
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16 // software must display the following acknowledgement: This product
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17 // includes software developed by tm3d.de and its contributors.
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18 // * Neither the name of tm3d.de nor the names of its contributors may
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19 // be used to endorse or promote products derived from this software
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20 // without specific prior written permission.
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22 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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23 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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24 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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25 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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26 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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27 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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28 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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29 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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30 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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31 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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32 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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34 #define F_CPU 8000000UL
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36 #include <avr/interrupt.h>
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37 #include <util/delay.h>
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38 #include <avr/wdt.h>
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39 #include <avr/sleep.h>
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40 #include <avr/pgmspace.h>
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42 extern void OWINIT();
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43 extern void EXTERN_SLEEP();
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45 const float k_rs[54] PROGMEM ={0.000000,24.125000,48.585366,72.731707,96.829268,121.097561,145.700000,170.600000,195.650000,220.625000,245.365854,269.853659,294.119048,318.195122,342.166667,366.000000,389.761905,413.428571,437.023810,460.558140,484.047619,507.511628,530.976190,554.418605,577.883721,601.395349,624.952381,648.571429,672.285714,696.073171,719.976190,744.000000,768.146341,792.439024,816.853659,841.414634,866.125000,890.975000,916.000000,941.179487,966.525000,992.025641,1017.717949,1043.589744,1069.657895,1095.945946,1122.432432,1149.184211,1176.189189,1203.472222,1231.083333,1259.000000,1287.285714,1315.941176};
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46 //const float j_rs[70] PROGMEM ={0, 18.302913, 34.830476, 50.783019, 70.653704, 90.505455, 110.341818, 130.165455, 149.163636, 160.791071, 180.596364, 200.398214, 220.200000, 240.000000, 250.882883, 270.603636, 290.409091, 310.216364, 330.025455, 342.472727, 360.649091, 380.461818, 400.275000, 420.087273, 435.275676, 450.703636, 470.503636, 490.298214, 510.082456, 523.486726, 540.621053, 560.370175, 580.105172, 591.979487, 610.527119, 630.213559, 644.601653, 660.534426, 680.168852, 690.787097, 710.391935, 729.123810, 740.559375, 760.126562, 770.684615, 790.235385, 800.782812, 820.331250, 834.681250, 850.446032, 870.017460, 880.600000, 900.196774, 911.099187, 930.432787, 950.073333, 960.728333, 980.396667, 1000.078333, 1010.772881, 1030.475862, 1050.187931, 1065.717241, 1080.631034, 1100.358621, 1120.089655, 1131.840000,1150.556897, 1170.294737, 1190.035088};
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47 double gettemp_rs(double V) {
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48 uint8_t iv=(uint8_t)(V);
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49 float t0=pgm_read_float(&(k_rs[iv]));
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50 float t1=pgm_read_float(&(k_rs[iv+1]));
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51 return t0+(t1-t0)/1*(V-iv);
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55 uint8_t owid[8]={0x28, 0xA2, 0xD9, 0x84, 0x00, 0x16, 0x02, 0xAC};/**/
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56 uint8_t config_info[26]={0x01,0x02,0x00,0x00,0x00,0x00,0x00,0x00,0x02,6,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00};
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59 #error "Variable not correct"
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62 extern uint8_t mode;
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63 extern uint8_t gcontrol;
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64 extern uint8_t reset_indicator;
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65 extern uint8_t alarmflag;
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68 volatile uint8_t wdcounter;
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72 volatile uint8_t bytes[8];
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83 volatile pack_t pack;
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88 #if defined(__AVR_ATtiny24__)||defined(__AVR_ATtiny44__) || defined(__AVR_ATtiny84__) || defined(__AVR_ATtiny24A__)||defined(__AVR_ATtiny44A__) || defined(__AVR_ATtiny84A__)
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89 ISR(WATCHDOG_vect) {
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93 //sleep_disable(); // Disable Sleep on Wakeup
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95 if (reset_indicator==1) reset_indicator++;
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96 else if (reset_indicator==2) mode=0;
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97 /* if (timeout==2) {
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103 //sleep_enable(); // Enable Sleep Mode
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108 #define OWM_PORT PORTA
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109 #define OWM_PIN PINA
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110 #define OWM_PINN PINA0
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111 #define OWM_DD DDRA
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113 #define OWM_SET_LOW OWM_PORT&=~(1<<OWM_PINN);OWM_DD|=(1<<OWM_PINN)
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114 #define OWM_SET_HIGH OWM_DD&=~(1<<OWM_PINN);OWM_PORT|=(1<<OWM_PINN)
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116 #define OWM_IS_LOW ((OWM_PIN & (1<<OWM_PINN))==0)
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120 OWM_PORT|=(1<<OWM_PINN); //PULL UP
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121 OWM_DD&=~(1<<OWM_PINN);
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124 #define owm_delay(us1) _delay_us(us1)
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126 uint8_t owm_reset() {
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131 if (OWM_IS_LOW) {owm_delay(420); return 1;} else {owm_delay(420); return 0;}
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136 void owm_rw(uint8_t *b) {
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160 void owm_block(uint8_t count, uint8_t *buf){
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162 for(i=0;i<count;i++) {
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167 inline int16_t ow_fconvert(uint8_t b1, uint8_t b2) {
169 tsht=b1 |((int)b2<<8);
174 volatile double V,ktemp;
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176 uint16_t ADmess() {
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179 while ((ADCSRA&(1<<ADSC)));
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184 //PRR|=(1<<PRUSI)|(1<<PRADC); //Switch off usi and adc for save Power
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192 PORTA=0xFF-(1<<PINA1)-(1<<PINA2);
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196 MCUCR &=~(1<<PUD); //All Pins Pullup...
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199 WDTCSR |= ((1<<WDCE) ); // Enable the WD Change Bit//| (1<<WDE)
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200 WDTCSR |= (1<<WDIE) | // Enable WDT Interrupt
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201 (1<<WDP2) | (1<<WDP1); // Set Timeout to ~1 seconds
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205 ADCSRA=(1<<ADEN)|(1<<ADPS2)|(1<<ADPS1)|(1<<ADPS0);
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213 owm_block(5,block);
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216 for(uint8_t i=1;i<9;i++) {
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219 owm_block(9,block);
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221 if (block[1]==0x28) { //DS18B20 angeschlossen
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222 for(uint8_t i=0;i<8;i++) {
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223 owid[i]=block[i+1];
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225 while(EECR & (1<<EEPE));
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228 if (EEDR!=0x28) { //Wenn keine ID im Eeprom uebernimm es
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229 for(uint8_t a=0;a<8;a++) {
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230 while(EECR & (1<<EEPE));
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231 EECR = (0<<EEPM1)|(0<<EEPM0);
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234 EECR |= (1<<EEMPE);
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240 uint16_t ares[16],sum;
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242 ares[0]=0;//ADmess();
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243 for (par=1;par<16;par++) {
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252 ares[par]=ADmess();
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258 PORTB|=(1<<PORTB0);
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260 for(uint8_t i=0;i<16;i++) {
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263 V=sum/20.0/1024.0*1.12*1000.0/16.0;
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264 //V=sum/20.0/1024.0*1.01*1000.0/16.0;
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265 ktemp=gettemp_rs(V);
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269 owm_block(2,block);
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274 for(uint8_t i=0;i<9;i++) block[i+2]=0xFF;
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275 owm_block(11,block);
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277 if (PINB&(1<<PINB0)) {
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278 htemp=(ktemp*16+(block[2]|(block[3]<<8)))/10;
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281 htemp=ktemp*16+(block[2]|(block[3]<<8));
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283 uint8_t t8=pack.temp>>4;
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285 if (t8>pack.TH) af=1;
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286 if (t8<=pack.TL) af=1;
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292 PORTB&=~(1<<PORTB0);
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296 #if defined(__AVR_ATtiny25__)||defined(__AVR_ATtiny45__) || defined(__AVR_ATtiny85__)
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297 if (((TIMSK & (1<<TOIE0))==0)&& (mode==0))
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299 #if defined(__AVR_ATtiny24__)||defined(__AVR_ATtiny44__) || defined(__AVR_ATtiny84__) ||defined(__AVR_ATtiny24A__)||defined(__AVR_ATtiny44A__) || defined(__AVR_ATtiny84A__)
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300 if (((TIMSK0 & (1<<TOIE0))==0)&& (mode==0))
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303 // CLKPR=(1<<CLKPCE);
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304 // CLKPR=(1<<CLKPS2); /*0.5Mhz*/
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305 // PORTB&=~(1<<PINB1);
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306 MCUCR|=(1<<SE)|(1<<SM1);
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307 MCUCR&=~(1<<ISC01);
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