1 // Copyright (c) 2017, Tobias Mueller tm(at)tm3d.de
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2 // All rights reserved.
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4 // Redistribution and use in source and binary forms, with or without
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5 // modification, are permitted provided that the following conditions are
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8 // * Redistributions of source code must retain the above copyright
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9 // notice, this list of conditions and the following disclaimer.
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10 // * Redistributions in binary form must reproduce the above copyright
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11 // notice, this list of conditions and the following disclaimer in the
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12 // documentation and/or other materials provided with the
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14 // * All advertising materials mentioning features or use of this
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15 // software must display the following acknowledgement: This product
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16 // includes software developed by tm3d.de and its contributors.
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17 // * Neither the name of tm3d.de nor the names of its contributors may
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18 // be used to endorse or promote products derived from this software
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19 // without specific prior written permission.
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21 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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22 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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23 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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24 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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25 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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26 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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27 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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28 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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29 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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30 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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31 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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35 #define F_CPU 8000000UL
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37 #include <avr/interrupt.h>
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38 #include <util/delay.h>
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39 #include <avr/wdt.h>
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40 #include <avr/sleep.h>
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44 extern void OWINIT();
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46 uint8_t owid[8]={0x1D, 0xA2, 0xD9, 0x84, 0x00, 0x26, 0x02, 0x5C};/**/
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47 uint8_t config_info[26]={9,13,9,13,9,13,9,13,0x02,19,19,19,19,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}; //+2 for CRC
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51 extern uint8_t mode;
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52 extern uint8_t gcontrol;
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53 extern uint8_t reset_indicator;
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61 volatile uint8_t bytes[45];
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65 uint8_t scratch[32];//3
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66 uint32_t counter; //35
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73 volatile uint8_t lastcps;
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79 volatile counters_t counters;
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81 volatile uint8_t istat;
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82 volatile uint8_t changefromeeprom;
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86 #if defined(__AVR_ATtiny24__)||defined(__AVR_ATtiny44__) || defined(__AVR_ATtiny84__) || defined(__AVR_ATtiny24A__)||defined(__AVR_ATtiny44A__) || defined(__AVR_ATtiny84A__)
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87 #define PCINT_VECTOR PCINT0_vect
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88 #define PIN_REG PINA
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89 #define PIN_DDR DDRA
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90 #define PIN_CH2 (1<<PINA4)
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91 #define PIN_CH3 (1<<PINA5)
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92 #define PIN_CH0 (1<<PINA6)
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93 #define PIN_CH1 (1<<PINA7)
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94 #define PORT_EE PINA //WARNING have to be the same PORT like PINREG because of istat
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95 #define PIN_EE (1<<PINA0)
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96 #define TEST_TIMER ((TIMSK0 & (1<<TOIE0))==0)
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102 if (((PIN_REG&PIN_CH2)==0)&&((istat&PIN_CH2)==PIN_CH2)) { counters.c32[2]++; }
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103 if (((PIN_REG&PIN_CH3)==0)&&((istat&PIN_CH3)==PIN_CH3)) { counters.c32[3]++; }
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104 if (((PIN_REG&PIN_CH0)==0)&&((istat&PIN_CH0)==PIN_CH0)) { counters.c32[0]++; }
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105 if (((PIN_REG&PIN_CH1)==0)&&((istat&PIN_CH1)==PIN_CH1)) { counters.c32[1]++; }
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107 changefromeeprom=1;
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111 ISR(ANA_COMP_vect) {
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112 if (changefromeeprom==0) return;
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113 if ((ACSR&(1<<ACO))!=0) {
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115 if ((ACSR&(1<<ACO))!=0) {
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116 CLKPR=0x80;//Switch to 4 MHz
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121 for(uint8_t i=0;i<16;i++) {
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122 uint8_t addr=i^0x0C;
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123 while(EECR & (1<<EEPE));
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124 EECR = (0<<EEPM1)|(0<<EEPM0);
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126 EEDR = counters.c8[addr];
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127 EECR |= (1<<EEMPE);
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130 changefromeeprom=0;
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131 PORTB&=~(1<<PINB1);
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142 DDRB&=~(1<<PORTB0); //Eingang
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143 __asm__ __volatile__ ("nop");
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144 PORTB|=(1<<PORTB0); //Pullup
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145 __asm__ __volatile__ ("nop");
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146 __asm__ __volatile__ ("nop");
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147 __asm__ __volatile__ ("nop");
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148 __asm__ __volatile__ ("nop");
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149 __asm__ __volatile__ ("nop");
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150 r=PINB&(1<<PORTB0);
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151 __asm__ __volatile__ ("nop");
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152 PORTB&=~(1<<PORTB0);
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153 __asm__ __volatile__ ("nop");
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154 DDRB|=(1<<PORTB0); //Eingang
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162 PRR|=(1<<PRUSI)|(1<<PRADC); //Switch off usi and adc for save Power
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170 changefromeeprom=1;
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171 ACSR|=(1<<ACD); //Disable Comparator
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172 ADCSRB|=(1<<ACME); //Disable Analog multiplexer
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173 MCUCR &=~(1<<PUD); //All Pins Pullup...
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175 #if defined(__AVR_ATtiny24__)||defined(__AVR_ATtiny44__) || defined(__AVR_ATtiny84__) || defined(__AVR_ATtiny24A__)||defined(__AVR_ATtiny44A__) || defined(__AVR_ATtiny84A__)
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177 PORTB|=0xFF-(1<<PINB2); //Make PullUp an all Pins but not OW_PIN
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179 PORTA&=~(1<<PINA2); //AIN1
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181 PORTA&=~((1<<PINA4)|(1<<PINA5));
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182 PORTA&=~((1<<PINA6)|(1<<PINA7));
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186 PCMSK0=(1<<PCINT4)|(1<<PCINT5)
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187 |(1<<PCINT6)|(1<<PCINT7);
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197 if (testSW()) { //Jumper gesetzt ->Ruecksetzen
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198 for(uint8_t i=0;i<16;i++) {
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199 while(EECR & (1<<EEPE));
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200 EECR = (0<<EEPM1)|(0<<EEPM0);
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203 EECR |= (1<<EEMPE);
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209 for(uint8_t i=0;i<16;i++) {
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211 while(EECR & (1<<EEPE));
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214 counters.c8[addr]=EEDR;
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216 changefromeeprom=0; //Daten neu eingelesen
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217 for (uint8_t i=0;i<4;i++) {
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218 if (counters.c32[i]==0xFFFFFFFF) {
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220 changefromeeprom=1; //Daten geaendert
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222 //counters.c32[i]=0;
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226 /*for(uint8_t i=0;i<16;i++) {
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227 while(EECR & (1<<EEPE));
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230 EECR |= (1<<EEMPE);
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237 DIDR0|=(1<<ADC2D)|(1<<ADC1D); // Disable Digital input on Analog AIN0/AIN1 (PINA1 / PINA2)
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239 ACSR|=(1<<ACIE)|(1<<ACIS1)|(1<<ACIS0)|(1<<ACBG); //Enabble comperator interrupt Rising edge....(1<<ACIS0)
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243 PORTB&=~(1<<PINB1);
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