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Many changes from 2018
[owSlave2.git]
/
DS2423_komische platine
/
DS2423.c
diff --git
a/DS2423_komische platine/DS2423.c
b/DS2423_komische platine/DS2423.c
index
2cf20e3
..
11f51db
100644
(file)
--- a/
DS2423_komische platine/DS2423.c
+++ b/
DS2423_komische platine/DS2423.c
@@
-1,5
+1,5
@@
\r
\r
-// Copyright (c) 201
6
, Tobias Mueller tm(at)tm3d.de
\r
+// Copyright (c) 201
7
, Tobias Mueller tm(at)tm3d.de
\r
// All rights reserved.
\r
//
\r
// Redistribution and use in source and binary forms, with or without
\r
// All rights reserved.
\r
//
\r
// Redistribution and use in source and binary forms, with or without
\r
@@
-45,7
+45,7
@@
extern void OWINIT();
\r
\r
uint8_t owid[8]={0x1D, 0xA2, 0xD9, 0x84, 0x00, 0x26, 0x02, 0x5C};/**/
\r
extern void OWINIT();
\r
\r
uint8_t owid[8]={0x1D, 0xA2, 0xD9, 0x84, 0x00, 0x26, 0x02, 0x5C};/**/
\r
-uint8_t config_info[
16]={0x02,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x02
,0x00,0x00,0x00,0x00,0x00,0x00,0x00};
\r
+uint8_t config_info[
26]={9,13,9,13,9,13,9,13,0x02,19,19,19,19,0x00,0x00,0x00,0x00,0x00,0x00
,0x00,0x00,0x00,0x00,0x00,0x00,0x00};
\r
\r
\r
\r
\r
\r
\r
@@
-54,7
+54,7
@@
extern uint8_t gcontrol;
extern uint8_t reset_indicator;
\r
\r
\r
extern uint8_t reset_indicator;
\r
\r
\r
-volatile uint8_t wdcounter;
\r
+
\r
\r
\r
\r
\r
\r
\r
@@
-80,7
+80,7
@@
typedef union {
volatile counters_t counters;
\r
\r
volatile uint8_t istat;
\r
volatile counters_t counters;
\r
\r
volatile uint8_t istat;
\r
-
\r
+volatile uint8_t changefromeeprom;
\r
#define PCINT_VECTOR PCINT0_vect
\r
#define PIN_REG PINA
\r
#define PIN_DDR DDRA
\r
#define PCINT_VECTOR PCINT0_vect
\r
#define PIN_REG PINA
\r
#define PIN_DDR DDRA
\r
@@
-111,8
+111,8
@@
ISR(PCINT0_vect) {
if (((PIN_REG&PIN_CH1)==0)&&((istat&PIN_CH1)==PIN_CH1)) { counters.c32[1]++; LPORT_CH2|=LPIN_CH2;}
\r
if (((PIN_REG&PIN_CH2)==0)&&((istat&PIN_CH2)==PIN_CH2)) { counters.c32[2]++; LPORT_CH2|=LPIN_CH2;}
\r
if (((PIN_REG&PIN_CH3)==0)&&((istat&PIN_CH3)==PIN_CH3)) { counters.c32[3]++; LPORT_CH2|=LPIN_CH2;}
\r
if (((PIN_REG&PIN_CH1)==0)&&((istat&PIN_CH1)==PIN_CH1)) { counters.c32[1]++; LPORT_CH2|=LPIN_CH2;}
\r
if (((PIN_REG&PIN_CH2)==0)&&((istat&PIN_CH2)==PIN_CH2)) { counters.c32[2]++; LPORT_CH2|=LPIN_CH2;}
\r
if (((PIN_REG&PIN_CH3)==0)&&((istat&PIN_CH3)==PIN_CH3)) { counters.c32[3]++; LPORT_CH2|=LPIN_CH2;}
\r
-
\r
-
if (((PORT_EE&PIN_EE)==0)&&((istat&PIN_EE)==PIN_EE)) {
\r
+ changefromeeprom=1;
\r
+
/*
if (((PORT_EE&PIN_EE)==0)&&((istat&PIN_EE)==PIN_EE)) {
\r
\r
_delay_ms(50);
\r
if (((PORT_EE&PIN_EE)==0)) {
\r
\r
_delay_ms(50);
\r
if (((PORT_EE&PIN_EE)==0)) {
\r
@@
-135,7
+135,7
@@
ISR(PCINT0_vect) {
\r
}
\r
GIFR|=(1<<PCIF0);
\r
\r
}
\r
GIFR|=(1<<PCIF0);
\r
- }
\r
+ }
*/
\r
if ((((PINA&(1<<PINA6)))==0)&&((istat&(1<<PINA6))==(1<<PINA6))) {
\r
_delay_ms(100);
\r
if (((PINA&(1<<PINA6)))==0) {
\r
if ((((PINA&(1<<PINA6)))==0)&&((istat&(1<<PINA6))==(1<<PINA6))) {
\r
_delay_ms(100);
\r
if (((PINA&(1<<PINA6)))==0) {
\r
@@
-155,7
+155,34
@@
ISR(PCINT0_vect) {
\r
}
\r
\r
\r
}
\r
\r
-
\r
+ISR(ANA_COMP_vect) {
\r
+ if (changefromeeprom==0) return;
\r
+ if ((ACSR&(1<<ACO))!=0) {
\r
+ _delay_ms(5);
\r
+ if ((ACSR&(1<<ACO))!=0) {
\r
+ CLKPR=0x80;//Switch to 4 MHz
\r
+ CLKPR=01;
\r
+
\r
+ PORTB|=(1<<PINB1);
\r
+ EEARH=0;
\r
+ for(uint8_t i=0;i<16;i++) {
\r
+ uint8_t addr=i^0x0C;
\r
+ while(EECR & (1<<EEPE));
\r
+ EECR = (0<<EEPM1)|(0<<EEPM0);
\r
+ EEARL = i;
\r
+ EEDR = counters.c8[addr];
\r
+ EECR |= (1<<EEMPE);
\r
+ EECR |= (1<<EEPE);
\r
+ }
\r
+ changefromeeprom=0;
\r
+ PORTB&=~(1<<PINB1);
\r
+ CLKPR=0x80;
\r
+ CLKPR=0;
\r
+ GIFR|=(1<<INTF0);
\r
+ }
\r
+ }
\r
+
\r
+}
\r
int main(void){
\r
PRR|=(1<<PRUSI)|(1<<PRADC); //Switch off usi and adc for save Power
\r
OWINIT();
\r
int main(void){
\r
PRR|=(1<<PRUSI)|(1<<PRADC); //Switch off usi and adc for save Power
\r
OWINIT();
\r
@@
-211,26
+238,31
@@
int main(void){
EECR |= (1<<EERE);
\r
counters.c8[addr]=EEDR;
\r
}
\r
EECR |= (1<<EERE);
\r
counters.c8[addr]=EEDR;
\r
}
\r
+ changefromeeprom=0; //Daten neu eingelesen
\r
for (uint8_t i=0;i<4;i++) {
\r
for (uint8_t i=0;i<4;i++) {
\r
- if (counters.c32[i]==0xFFFFFFFF) counters.c32[i]=0;
\r
+ if (counters.c32[i]==0xFFFFFFFF) {
\r
+ counters.c32[i]=0;
\r
+ changefromeeprom=1; //Daten geaendert
\r
+ }
\r
//counters.c32[i]=0;
\r
}
\r
\r
//counters.c32[i]=0;
\r
}
\r
\r
-
\r
+ DIDR0|=(1<<ADC0D); // Disable Digital input AD0
\r
+ ACSR&=~(1<<ACD); //Enable Comperator
\r
+ ADCSRB|=(1<<ACME); // Set other negative input
\r
+ ADCSRA&=~(1<<ADEN); //Disable A/D for change the negetive comperator input
\r
+ ADMUX&=~((1<<MUX0)|(1<<MUX1)|(1<<MUX2)|(1<<MUX3)|(1<<MUX4)|(1<<MUX5)); //Set do ADC0
\r
+ ACSR|=(1<<ACIE)|(1<<ACIS1)|(1<<ACIS0)|(1<<ACBG); //Enabble comperator interrupt Rising edge....(1<<ACIS0)
\r
+
\r
sei();
\r
while(1) {
\r
if (LPORT_CH2&LPIN_CH2) {
\r
_delay_ms(50);
\r
LPORT_CH2&=~LPIN_CH2;
\r
}
\r
sei();
\r
while(1) {
\r
if (LPORT_CH2&LPIN_CH2) {
\r
_delay_ms(50);
\r
LPORT_CH2&=~LPIN_CH2;
\r
}
\r
- //Test if timer active and no sleep then Idle else Power Down
\r
- if (TEST_TIMER&&(mode==0)) {
\r
- MCUCR|=(1<<SE)|(1<<SM1); //Power Down, only low level on 1-Wire and pin change on PCINT wakes up
\r
- MCUCR&=~(1<<ISC01);
\r
- } else {
\r
- MCUCR|=(1<<SE);
\r
- MCUCR&=~(1<<SM1);
\r
- }
\r
+ MCUCR|=(1<<SE);
\r
+ MCUCR&=~(1<<SM1);
\r
asm("SLEEP");
\r
asm("SLEEP");
\r
+
\r
}
\r
}
\ No newline at end of file
}
\r
}
\ No newline at end of file