1 // Copyright (c) 2015, Tobias Mueller tm(at)tm3d.de
2 // All rights reserved.
4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions are
8 // * Redistributions of source code must retain the above copyright
9 // notice, this list of conditions and the following disclaimer.
10 // * Redistributions in binary form must reproduce the above copyright
11 // notice, this list of conditions and the following disclaimer in the
12 // documentation and/or other materials provided with the
14 // * All advertising materials mentioning features or use of this
15 // software must display the following acknowledgement: This product
16 // includes software developed by tm3d.de and its contributors.
17 // * Neither the name of tm3d.de nor the names of its contributors may
18 // be used to endorse or promote products derived from this software
19 // without specific prior written permission.
21 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 .macro cljmp val,addr; Weiter sprung, wenn das ziel zu weit entfernt fuer brxx
46 .macro cset val,mod ;Nur der Mode wird gesetzt. Abkuerzung da oft nur das noch bleibt
58 #define OW_READ_ROM_COMMAND 1
60 #define OW_SEARCHROMS 3 ;next send two bit
61 #define OW_SEARCHROMR 4 ; next resive master answer
63 #define OW_READ_COMMAND 6
64 #define OW_FWCONFIGINFO 7
67 #ifdef _CHANGEABLE_ID_
68 #define OW_WRITE_NEWID 8
69 #define OW_READ_NEWID 9
70 #define OW_SET_NEWID 10
71 #define OW_FIRST_COMMAND 11
75 .macro CHANGE_ID_COMMANDS
76 cset 0x75,OW_WRITE_NEWID
77 cljmp 0xA7,hrc_set_readid
78 cljmp 0x79,hrc_set_setid
83 #define OW_FIRST_COMMAND 8
87 ; test auf run flasher command 0x88 in h_readcommand
92 1: ldi r_temp,0 ;Anderes Kommando flashmarker zuruecksetzen...
93 sts flashmarker,r_temp
98 cljmp 0x85,hrc_fw_configinfo
102 #ifdef _CHANGEABLE_ID_
103 ; lesen der ID aus dem EEPROM beim Start
106 push r_rwbyte//r_temp2 and Z is not in gnu C save area
107 ldi r_temp2,lo8(E2END)
110 out _SFR_IO_ADDR(EEARH), zh
115 sbic _SFR_IO_ADDR(EECR), EEPE
116 rjmp read_EEPROM_ID_loop
117 out _SFR_IO_ADDR(EEARL),r_temp2
118 sbi _SFR_IO_ADDR(EECR), EERE
119 in r_rwbyte,_SFR_IO_ADDR(EEDR)
121 breq read_EEPROM_ID_end
126 brne read_EEPROM_ID_loop
139 rjmp handle_end_no_bcount // sleep eventuell reset, nichts tun und auf Timeout warten
140 rjmp h_readromcommand
147 #ifdef _CHANGEABLE_ID_
158 cset 0x55,OW_MATCHROM
159 cjmp 0xF0,hrc_set_searchrom
160 cjmp 0xCC,hrc_start_read_command ;skip rom
161 cjmp 0x33,hrc_set_read_rom
162 cjmp 0xEC,hrc_set_alarm_search
164 rjmp handle_end_sleep
169 lds r_temp,flashmarker
171 brne hrc_jmp_flasher_inc
176 ret ; Direkter Sprung zum Bootloader
179 sts flashmarker,r_temp
180 rjmp handle_end_sleep
185 lds r_rwbyte,owid ;erstes Byte lesen
186 rjmp h_searchrom_next_bit
188 hrc_start_read_command: ;Skip rom und Matchrom ok...
189 ldi r_mode,OW_READ_COMMAND
194 ldi r_mode,OW_READROM
198 hrc_set_alarm_search:
201 brne hrc_set_searchrom ;alarm flag nicht 0 also gehe zu searchrom
203 rjmp handle_end_sleep
207 ldi r_mode,OW_FWCONFIGINFO
213 ;---------------------------------------------------
215 ;---------------------------------------------------
223 rjmp handle_end_sleep
227 breq hrc_start_read_command ;Starten von Read Command
232 ;---------------------------------------------------
234 ;---------------------------------------------------
237 h_searchrom_next_bit: ;Setup next Bit of ID
238 sts srbyte,r_rwbyte ;erstes Byte speichern von der Aufrufenden Ebene
240 com r_rwbyte ; negieren
241 ror r_temp2 ; erstes unnegiertes bit in Carry
242 rol r_rwbyte ;und dann als erstes bit in r_rwbyte
244 ldi r_bcount,0x40 ; zwei bits sensden dann zu Searchromr
245 ldi r_mode,OW_SEARCHROMR
246 rjmp handle_end_no_bcount
250 h_searchroms: ; Modus Send zwei bit
252 sbrc r_rwbyte,7 ; bit gesetz (1 empfangen)
254 lds r_bcount,srbyte ;r_bcount wird am ende gesetzt
257 rjmp h_searchroms_next ; Vergleich des letzen gelesenen bits mit der id
262 rjmp handle_end_sleep
263 h_searchroms_next: ; Setup next bit
264 inc r_bytep ; zaehler der Bits erhoehen
265 sbrc r_bytep,6 ; 64 bit erreicht
266 rjmp h_searchrom_end_ok ;alles ok auf Command warten
269 brne h_searchroms_next_bit ; bit zwischen 0 und 8
270 mov r_bcount,r_bytep ; next Byte lesen
275 configZ owid,r_bcount
278 rjmp h_searchrom_next_bit
280 h_searchroms_next_bit: ;next Bit lesen
281 ;sts srbytep,r_bcount
283 lsr r_rwbyte ;aktuelles byte weiterschieben r_rwbyte hier zweckefrei verwendet
284 rjmp h_searchrom_next_bit ;algemeine routine zum vorbereiten
287 rjmp hrc_start_read_command
291 ldi r_mode,OW_SEARCHROMS
293 rjmp handle_end_no_bcount
296 ;---------------------------------------------------
298 ;---------------------------------------------------
307 rjmp handle_end_sleep
310 ;---------------------------------------------------
312 ;---------------------------------------------------
316 breq h_fwconfiginfo_crc
319 breq h_fwconfiginfo_all
320 #elif defined _CRC16_
322 breq h_fwconfiginfo_crc2
324 breq h_fwconfiginfo_all
327 breq h_fwconfiginfo_all
328 #warning No CRC known code implemented
330 configZ config_info,r_bytep
340 rjmp handle_end_sleep
343 ;---------------------------------------------------
344 ; CHANGE ROM FUNCTIONS
345 ;---------------------------------------------------
348 #ifdef _CHANGEABLE_ID_
351 configZ newid,r_bytep
357 rjmp handle_end_sleep
361 ldi r_mode,OW_READ_NEWID
366 configZ newid,r_bytep
371 rjmp handle_end_sleep
374 ldi r_mode,OW_SET_NEWID
375 ;ldi r_bytep,1 ;start to write in 2
376 rjmp handle_end_inc ;set r_bytep to 1!!!
382 brne h_setid_bad_code_all
389 rjmp h_setid_bad_code_all ;sollte eigentlich nicht passieren
397 ldi r_temp2,lo8(E2END)
401 ;ldi r_temp,0 ;kommt nicht vor das ein E2ROM genau n*256+(0 bis 7) byte gross ist
403 out _SFR_IO_ADDR(EEARH),zh
407 h_setid_EEPROM_write:
408 sbic _SFR_IO_ADDR(EECR), EEPE
409 rjmp h_setid_EEPROM_write
410 ldi r_temp, (0<<EEPM1)|(0<<EEPM0)
411 out _SFR_IO_ADDR(EECR), r_temp
412 ;nur adresse L schreiben H bleibt aus oben genannten grund gleich.
413 out _SFR_IO_ADDR(EEARL),r_temp2
415 out _SFR_IO_ADDR(EEDR), r_rwbyte
416 sbi _SFR_IO_ADDR(EECR), EEMPE
417 sbi _SFR_IO_ADDR(EECR), EEPE
421 brne h_setid_EEPROM_write
423 h_setid_bad_code_all:
424 rjmp handle_end_sleep
442 ; check for bootloader jumper
443 ;vor allen anderen Registerconfigs
445 ldi r_temp,(1<<PUD) ;enable pullup
446 out _SFR_IO_ADDR(MCUCR) ,r_temp
447 sbi _SFR_IO_ADDR(PORTA),PINA5 ;internal pullup on PINA5
448 sbi _SFR_IO_ADDR(PORTA),PINA4 ;internal pullup on PINA4
450 sbis _SFR_IO_ADDR(PINA),PINA5
451 rjmp owinit_botest_end ;PinA5 nicht auf 1
452 sbis _SFR_IO_ADDR(PINA),PINA4
453 rjmp owinit_botest_end ;PinA4 nicht auf 1
454 cbi _SFR_IO_ADDR(PORTA),PINA4
455 sbi _SFR_IO_ADDR(DDRA),PINA4 ;PINA4 AUSGANG und 0
457 sbic _SFR_IO_ADDR(PINA),PINA5
458 rjmp owinit_botest_end ;PINA5 nicht 0.... nicht verbunden
459 cbi _SFR_IO_ADDR(DDRA),PINA4
464 ret ; Direkter Sprung zum Bootloader*/
467 HW_INIT //Microcontroller specific
468 CHIP_INIT //1-Wire device specific
469 #ifdef _CHANGEABLE_ID_
486 sts mode,r_temp ;SLEEP