--- /dev/null
+\r
+// Copyright (c) 2018, Tobias Mueller tm(at)tm3d.de\r
+// All rights reserved.\r
+//\r
+// Redistribution and use in source and binary forms, with or without\r
+// modification, are permitted provided that the following conditions are\r
+// met:\r
+//\r
+// * Redistributions of source code must retain the above copyright\r
+// notice, this list of conditions and the following disclaimer.\r
+// * Redistributions in binary form must reproduce the above copyright\r
+// notice, this list of conditions and the following disclaimer in the\r
+// documentation and/or other materials provided with the\r
+// distribution.\r
+// * All advertising materials mentioning features or use of this\r
+// software must display the following acknowledgement: This product\r
+// includes software developed by tm3d.de and its contributors.\r
+// * Neither the name of tm3d.de nor the names of its contributors may\r
+// be used to endorse or promote products derived from this software\r
+// without specific prior written permission.\r
+//\r
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\r
+// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\r
+// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT\r
+// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,\r
+// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\r
+// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\r
+// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\r
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+\r
+#define F_CPU 8000000UL\r
+#include <avr/io.h>\r
+#include <avr/interrupt.h>\r
+#include <util/delay.h>\r
+#include <avr/wdt.h>\r
+#include <avr/sleep.h>\r
+#include <avr/pgmspace.h>\r
+#include "../common/I2C/TWI_Master.h"\r
+#include "../common/owSlave_tools.h"\r
+#include "../common/I2C/SHT3x.h"\r
+#include "../common/calibr.h"\r
+\r
+\r
+#include <math.h>\r
+\r
+extern void OWINIT();\r
+extern void EXTERN_SLEEP();\r
+extern uint8_t stat_to_sample;\r
+\r
+uint8_t owid1[8]={0x28, 0xA3, 0xD9, 0x84, 0x00, 0x16, 0x05, 0x18};/**/\r
+uint8_t owid2[8]={0x29, 0xA2, 0xD9, 0x84, 0x00, 0x16, 0x01, 0x73};/**/\r
+uint8_t config_info1[26]={0x01,0x01, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x02,29,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00};\r
+uint8_t config_info2[26]={0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x02,0,0,0,0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00};\r
+\r
+OWST_EXTERN_VARS\r
+\r
+OWST_WDT_ISR\r
+\r
+\r
+\r
+typedef union {\r
+ volatile uint8_t bytes[8];\r
+ struct {\r
+ int16_t temp; //0\r
+ uint8_t TH; //2\r
+ uint8_t TL; //3\r
+ uint8_t config; //4\r
+ uint8_t rrFF; //5\r
+ uint8_t rr00; //6\r
+ uint8_t rr10; //7\r
+ };\r
+} pack1_t;\r
+volatile pack1_t pack1;\r
+\r
+typedef union {\r
+ volatile uint8_t bytes[0x20];\r
+ struct {\r
+ uint8_t PIO_Logic_State; // 0088h\r
+ uint8_t PIO_Output_Latch_State;\r
+ uint8_t PIO_Activity_Latch_State;\r
+ uint8_t Conditional_Search_Channel_Selection_Mask;\r
+ uint8_t Conditional_Search_Channel_Polarity_Selection;\r
+ uint8_t Status; //008D\r
+ uint8_t FF1;\r
+ uint8_t FF2;\r
+ \r
+ };\r
+} pack2_t;\r
+volatile pack2_t pack2;\r
+\r
+uint8_t values[10];\r
+uint8_t ap=1;\r
+\r
+uint8_t crc8_f() {\r
+ uint8_t lscrc=0x0;\r
+ for(uint8_t i=0;i<5;i++) {\r
+ uint8_t v=values[i];\r
+ //if (v==0) v=0xFF;\r
+ uint8_t bit=1;\r
+ uint8_t lb;\r
+ for(uint8_t j=0;j<8;j++) {\r
+ if ((v&bit)==bit) lb=1; else lb=0;\r
+ if ((lscrc&1)!=lb) lscrc=(lscrc>>1)^0x8c; else lscrc=(lscrc>>1);\r
+ bit=bit*2;\r
+ \r
+ \r
+ }\r
+ }\r
+ return lscrc;\r
+}\r
+\r
+\r
+//Umstellung\r
+\r
+//rh=(T-25)*(0,01+0,00008*x)-2,0468+0,0367*x-0,0000015955*x*x\r
+//d1 for 3V\r
+#define d1 -39.7 \r
+#define d2 0.01\r
+inline uint16_t calcSHT75_T(double real_t) {\r
+ return (real_t-d1)/d2;\r
+}\r
+\r
+inline uint16_t calcSHT75RH_lin(double real_RHlin) {\r
+ return 11501.1-0.280297*sqrt(1667284153.0-7977500.0*real_RHlin);\r
+}\r
+\r
+inline double calcSHT75H_tcorr(double real_t,double real_RHtrue) {\r
+ return real_RHtrue-(real_t-25)*(0.01+0.00008*calcSHT75RH_lin(real_RHtrue));\r
+\r
+}\r
+\r
+\r
+double T=20.0;\r
+double RH=60;\r
+\r
+int main(void){\r
+ OWST_INIT_USI_ON;\r
+ pack2.FF1=0xFF;\r
+ pack2.FF2=0xFF;\r
+ //0x0E 0x19 0x48 0x00\r
+ if (RH<8) RH=8;\r
+ uint16_t lt=calcSHT75_T(T);\r
+ double lfc=calcSHT75H_tcorr(T,RH);\r
+ uint16_t lf=calcSHT75RH_lin(lfc);\r
+ values[0]=0x00;\r
+ values[1]=lt&0xFF; if (values[1]==0) values[1]=1;\r
+ values[2]=lt>>8; if (values[2]==0) values[2]=1;\r
+ values[3]=lf&0xFF; if (values[3]==0) values[3]=1;\r
+ values[4]=lf>>8; if (values[4]==0) values[4]=1;\r
+ values[5]=0x5D; \r
+ values[6]=0x00;\r
+ values[7]=0x00;\r
+ values[5]=crc8_f(); \r
+ \r
+ OWINIT();\r
+\r
+ TWI_Master_Initialise();\r
+ initSHT3x(0);\r
+ _delay_ms(100);\r
+\r
+\r
+ getSHT3xHumTemp(0,&T,&RH);\r
+ OWST_WDR_CONFIG8;\r
+ sei();\r
+ stat_to_sample=0x55;\r
+ while (1) {\r
+ //stat_to_sample=0;\r
+ if (reset_indicator) {\r
+ // ap=0;\r
+ // stat_to_sample=0;\r
+ // reset_indicator=0;\r
+ }\r
+ if (wdcounter>3) {\r
+ \r
+ wdcounter=0;\r
+ RH=RH+0.2;\r
+ getSHT3xHumTemp(0,&T,&RH);\r
+ //pack1.temp=T*16.0;\r
+ lt=calcSHT75_T(T);\r
+ lfc=calcSHT75H_tcorr(T,RH);\r
+ lf=calcSHT75RH_lin(lfc);\r
+ values[0]=0x00;\r
+ values[1]=lt&0xFF; if (values[1]==0) values[1]=1;\r
+ values[2]=lt>>8; if (values[2]==0) values[2]=1;\r
+ values[3]=lf&0xFF; if (values[3]==0) values[3]=1;\r
+ values[4]=lf>>8; if (values[4]==0) values[4]=1;\r
+ values[5]=crc8_f();\r
+ if (values[5]==0) values[3]=values[3]+1; //CRC darf nicht 0 sein ... warum auch immer\r
+ values[5]=crc8_f();\r
+ }\r
+ pack2.Status|=0x80;\r
+ if (gcontrol&1) {\r
+ uint8_t bb=1;\r
+ for(uint8_t i=0;i<8;i++) {\r
+ if ((pack2.PIO_Logic_State&bb)!=(pack2.PIO_Output_Latch_State&bb)) pack2.PIO_Activity_Latch_State|=bb;\r
+ bb=bb*2;\r
+ }\r
+ pack2.PIO_Logic_State=pack2.PIO_Output_Latch_State;\r
+ gcontrol&=~0x01;\r
+ }\r
+ if (gcontrol&2) {\r
+ pack2.PIO_Activity_Latch_State=0;\r
+ gcontrol&=~0x02;\r
+ }\r
+ if (gcontrol&4) {\r
+ stat_to_sample=values[ap];\r
+ ap++; \r
+ if (ap>5) {\r
+ ap=0;\r
+ }\r
+ gcontrol&=~0x04;\r
+ } \r
+ if (gcontrol&8) {\r
+ ap=1;\r
+ stat_to_sample=values[ap];\r
+ ap++;\r
+ //if (ap>5) ap=1;\r
+ gcontrol&=~0x08;\r
+ } \r
+ if ((gcontrol&16)==16) {\r
+ \r
+ \r
+ uint16_t w=T*16.0;\r
+ uint8_t t8=w>>4;\r
+ uint8_t af=0;\r
+ if (t8>pack1.TH) af=1;\r
+ if (t8<=pack1.TL) af=1;\r
+ cli();\r
+ pack1.temp=w;\r
+ //pack.temp++;\r
+ alarmflag=af;\r
+ sei();\r
+ gcontrol=0;\r
+ EXTERN_SLEEP();\r
+ }\r
+\r
+ OWST_MAIN_END\r
+ }\r
+\r
+\r
+\r
+}\r