--- /dev/null
+// Copyright (c) 2018, Tobias Mueller tm(at)tm3d.de\r
+// All rights reserved.\r
+//\r
+// Redistribution and use in source and binary forms, with or without\r
+// modification, are permitted provided that the following conditions are\r
+// met:\r
+//\r
+// * Redistributions of source code must retain the above copyright\r
+// notice, this list of conditions and the following disclaimer.\r
+// * Redistributions in binary form must reproduce the above copyright\r
+// notice, this list of conditions and the following disclaimer in the\r
+// documentation and/or other materials provided with the\r
+// distribution.\r
+// * All advertising materials mentioning features or use of this\r
+// software must display the following acknowledgement: This product\r
+// includes software developed by tm3d.de and its contributors.\r
+// * Neither the name of tm3d.de nor the names of its contributors may\r
+// be used to endorse or promote products derived from this software\r
+// without specific prior written permission.\r
+//\r
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\r
+// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\r
+// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT\r
+// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,\r
+// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\r
+// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\r
+// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\r
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+\r
+//!!!!!Max Program size 7551 Byte\r
+\r
+#define F_CPU 8000000UL\r
+#include <avr/io.h>\r
+#include <avr/interrupt.h>\r
+#include <util/delay.h> \r
+#include <avr/wdt.h>\r
+#include <avr/sleep.h>\r
+#include <avr/pgmspace.h>\r
+#include "../common/owSlave_tools.h"\r
+\r
+\r
+OWST_EXTERN_VARS\r
+OWST_WDT_ISR\r
+\r
+\r
+//#define W1DAQ\r
+#define JOE_M\r
+volatile uint8_t owid1[8]={0x26, 0x61, 0xDA, 0x84, 0x00, 0x00, 0x03, 0x43};/**/\r
+volatile uint8_t owid2[8]={0x26, 0x62, 0xDA, 0x84, 0x00, 0x00, 0x03, 0x1A};/**/\r
+volatile uint8_t config_info1[26]={6,6,6,0x08, 6,8, 0x00,0x00, 0x02,20,20,20,0x00,0x00,0x00,0x00, 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}; \r
+volatile uint8_t config_info2[26]={6,6, 6,0x08,6,8, 0,0, 0x02,20,20,20,0,0x00,0x00,0x00, 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}; \r
+ \r
+#if (owid>128) \r
+#error "Variable not correct"\r
+#endif\r
+\r
+#ifdef JOE_M\r
+#define PIN_PIOA1 (1<<PINA4)\r
+#define ADMA1 PINA4\r
+#define PIN_PIOB1 (1<<PINA5)\r
+#define ADMB1 PINA5\r
+#define PIN_PIOA2 (1<<PINA6)\r
+#define ADMA2 PINA6\r
+#define PIN_PIOB2 (1<<PINA7)\r
+#define ADMB2 PINA7\r
+#define ADDIFF1 0b011010\r
+#define ADDIFF1G 0b011011\r
+#define ADDIFF2 0b011110\r
+#define ADDIFF2G 0b011111\r
+#endif\r
+\r
+#ifdef W1DAQ\r
+#define PIN_PIOB1 (1<<PINA1)\r
+#define ADMB1 PINA1\r
+#define PIN_PIOA1 (1<<PINA0)\r
+#define ADMA1 PINA0\r
+#define PIN_PIOB2 (1<<PINA7)\r
+#define ADMB2 PINA7\r
+#define PIN_PIOA2 (1<<PINA3)\r
+#define ADMA2 PINA3\r
+#define ADDIFF1 0b001000\r
+#define ADDIFF1G 0b001001\r
+#define ADDIFF2 0b011000\r
+#define ADDIFF2G 0b011001\r
+\r
+#endif\r
+\r
+\r
+\r
+\r
+\r
+typedef union {\r
+ #if defined(__AVR_ATtiny25__)\r
+ volatile uint8_t bytes[16];\r
+ #else\r
+ volatile uint8_t bytes[64];\r
+ #endif\r
+ struct {\r
+ uint8_t status; //1\r
+ int16_t temp; //2\r
+ uint16_t voltage; //4\r
+ int16_t current; //6\r
+ uint8_t threshold; //8\r
+ \r
+ uint8_t page1[8]; //9\r
+ #if defined(__AVR_ATtiny25__)\r
+ #else\r
+ uint8_t page2[8]; //17\r
+ uint8_t page3[8]; //25\r
+ \r
+ uint8_t page4[8]; //33\r
+ uint8_t page5[8]; //41\r
+ uint8_t page6[8]; //49\r
+ uint8_t page7[8]; //57\r
+ \r
+ #endif\r
+ };\r
+} pack_t;\r
+volatile pack_t pack2,pack1;\r
+\r
+\r
+\r
+volatile int16_t DS2438_1_TEMP;\r
+volatile uint16_t DS2438_1_VAD;\r
+volatile uint16_t DS2438_1_VDD;\r
+volatile int16_t DS2438_2_TEMP;\r
+volatile uint16_t DS2438_2_VAD;\r
+volatile uint16_t DS2438_2_VDD;\r
+\r
+OWST_ADC_CONF16_FUNC\r
+OWST_ADC_CONF16_OSS_FUNC\r
+OWST_TESTSW\r
+\r
+\r
+int main(void){\r
+ OWST_INIT_ADC_ON \r
+ pack2.page3[0]=0xF4;//Spannung\r
+ pack1.page3[0]=0xF4; //Spannung\r
+ OWINIT();\r
+ OWST_WDR_CONFIG4\r
+ OWST_EN_PULLUP\r
+ \r
+ PORTA&=~((PIN_PIOA1)|(PIN_PIOB1)|(PIN_PIOA2)|(PIN_PIOB2));\r
+ OWST_INIT_ADC\r
+ DIDR0=(PIN_PIOA1)|(PIN_PIOB1)|(PIN_PIOA2)|(PIN_PIOB2);\r
+\r
+ //ADCSRB|=(1<<ADLAR); Adiust left\r
+ volatile double VCC;\r
+ volatile double VAD_A,VAD_B,VAD_C,VAD_D;\r
+ \r
+ gcontrol=1;\r
+ sei();\r
+ while(1) {\r
+ if (gcontrol) {\r
+ wdcounter=3;\r
+ gcontrol=0;\r
+ \r
+ }\r
+ if (wdcounter>2) { \r
+ \r
+ wdcounter=0;\r
+ ADMUX=OWST_ADCIN_REFINT;\r
+ _delay_us(100);\r
+ VCC=owst_ADC_runf();\r
+ VCC=(1.079*65472.0)/VCC;\r
+ DS2438_2_VDD=VCC*100;\r
+ DS2438_1_VDD=VCC*100;\r
+\r
+ if (testSW()) {\r
+ ADMUX= ADDIFF1; //ADC0 + ADC1 - Gain 1\r
+ _delay_us(100);\r
+ VAD_A=owst_ADC_runf();\r
+ if (VAD_A<3100) {\r
+ ADMUX= ADDIFF1G; //ADC0 + ADC1 - Gain 20\r
+ _delay_us(100);\r
+ VAD_A=owst_ADC_runf();\r
+ VAD_A=VCC/20.0*VAD_A/65472.0;\r
+ } else {\r
+ VAD_A=owst_ADC_OSS_runf();\r
+ VAD_A=VCC*VAD_A/65472.0;\r
+ }\r
+ DS2438_1_VAD=VAD_A*100;\r
+ DS2438_1_TEMP=VAD_A*256;\r
+\r
+ ADMUX= ADDIFF2; //ADC0 + ADC1 - Gain 1\r
+ _delay_us(100);\r
+ VAD_B=owst_ADC_runf();\r
+ if (VAD_B<3100) {\r
+ ADMUX= ADDIFF2G; //ADC0 + ADC1 - Gain 20\r
+ _delay_us(100);\r
+ VAD_B=owst_ADC_runf();\r
+ VAD_B=VCC/20.0*VAD_B/65472.0;\r
+ } else {\r
+ VAD_B=owst_ADC_OSS_runf();\r
+ VAD_B=VCC*VAD_B/65472.0;\r
+ }\r
+ DS2438_2_VAD=VAD_B*100;\r
+ DS2438_2_TEMP=VAD_B*256;\r
+\r
+\r
+\r
+ } else {\r
+ ADMUX=ADMA1;\r
+ _delay_us(100);\r
+ VAD_A=owst_ADC_OSS_runf();\r
+ VAD_A=VCC*VAD_A/65472.0;\r
+ DS2438_1_TEMP=VAD_A*256;\r
+ \r
+ ADMUX=ADMB1;\r
+ _delay_us(100);\r
+ VAD_B=owst_ADC_OSS_runf();\r
+ VAD_B=VCC*VAD_B/65472.0;\r
+ DS2438_1_VAD=VAD_B*100;\r
+ \r
+ ADMUX=ADMA2;\r
+ _delay_us(100);\r
+ VAD_C=owst_ADC_OSS_runf();\r
+ VAD_C=VCC*VAD_C/65472.0;\r
+ DS2438_2_TEMP=VAD_C*256;\r
+ \r
+ ADMUX=ADMB2;\r
+ _delay_us(100);\r
+ VAD_D=owst_ADC_OSS_runf();\r
+ VAD_D=VCC*VAD_D/65472.0;\r
+ DS2438_2_VAD=VAD_D*100;\r
+ }\r
+ \r
+ \r
+\r
+ \r
+ }\r
+ \r
+ \r
+ OWST_MAIN_END\r
+ }\r
+\r
+\r
+}\r