--- /dev/null
+// Copyright (c) 2017, Tobias Mueller tm(at)tm3d.de\r
+// All rights reserved.\r
+//\r
+// Redistribution and use in source and binary forms, with or without\r
+// modification, are permitted provided that the following conditions are\r
+// met:\r
+//\r
+// * Redistributions of source code must retain the above copyright\r
+// notice, this list of conditions and the following disclaimer.\r
+// * Redistributions in binary form must reproduce the above copyright\r
+// notice, this list of conditions and the following disclaimer in the\r
+// documentation and/or other materials provided with the\r
+// distribution.\r
+// * All advertising materials mentioning features or use of this\r
+// software must display the following acknowledgement: This product\r
+// includes software developed by tm3d.de and its contributors.\r
+// * Neither the name of tm3d.de nor the names of its contributors may\r
+// be used to endorse or promote products derived from this software\r
+// without specific prior written permission.\r
+//\r
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\r
+// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\r
+// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT\r
+// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,\r
+// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\r
+// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\r
+// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\r
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+\r
+\r
+#define F_CPU 8000000UL\r
+#include <avr/io.h>\r
+#include <avr/interrupt.h>\r
+#include <util/delay.h>\r
+#include <avr/wdt.h>\r
+#include <avr/sleep.h>\r
+#include <avr/pgmspace.h>\r
+\r
+\r
+extern void OWINIT();\r
+extern void EXTERN_SLEEP();\r
+\r
+uint8_t owid[8]={0x26, 0xA3, 0xD9, 0x89, 0xDD, 0xDD, 0x05, 0x64};/**/\r
+uint8_t config_info[26]={0x01,0x06, 0x05,0x08, 0x06,0x08, 0x00,0x00, 0x02,0x09,0x00,0x09,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00};\r
+\r
+\r
+\r
+extern uint8_t mode;\r
+extern uint8_t gcontrol;\r
+extern uint8_t reset_indicator;\r
+extern uint8_t alarmflag;\r
+\r
+volatile uint8_t wdcounter;\r
+\r
+\r
+typedef union {\r
+\r
+ volatile uint8_t bytes[64];\r
+ struct {\r
+ uint8_t status; //1\r
+ int16_t temp; //2\r
+ uint16_t voltage; //4\r
+ uint16_t current; //6\r
+ uint8_t threshold; //8\r
+ \r
+ uint8_t page1[8]; //9\r
+ uint8_t page2[8]; //17\r
+ uint8_t page3[8]; //25\r
+ uint8_t page4[8]; //33\r
+ uint8_t page5[8]; //41\r
+ uint8_t page6[8]; //49\r
+ uint8_t page7[8]; //57\r
+ //uint8_t crc; //65\r
+ };\r
+} pack_t;\r
+volatile pack_t pack;\r
+\r
+\r
+volatile int16_t ds_temp;\r
+volatile uint16_t ds_vad;\r
+volatile uint16_t ds_vdd;\r
+\r
+#define CH1 (1<<PORTA0)\r
+#define CH2 (1<<PORTA1)\r
+#define CH3 (1<<PORTA2)\r
+#define PIN_CH1 PINA\r
+#define PIN_CH2 PINA\r
+#define PIN_CH3 PINA\r
+\r
+volatile uint8_t ch1,ch2,ch3;\r
+\r
+\r
+#if defined(__AVR_ATtiny24__)||defined(__AVR_ATtiny44__) || defined(__AVR_ATtiny84__) || defined(__AVR_ATtiny24A__)||defined(__AVR_ATtiny44A__) || defined(__AVR_ATtiny84A__)\r
+ISR(WATCHDOG_vect) {\r
+ #else\r
+ISR(WDT_vect) {\r
+ #endif\r
+ wdcounter++;if (wdcounter==11) wdcounter=10;\r
+ if (ch1>1) ch1++;\r
+ if (ch2>1) ch2++;\r
+ if (ch3>1) ch3++;\r
+ if (reset_indicator==1) reset_indicator++;\r
+ else if (reset_indicator==2) mode=0;\r
+\r
+}\r
+ \r
+ISR(PCINT0_vect) {\r
+\r
+ if ((PIN_CH1&CH1)==0) {if (ch1==0) ch1=1;} else {ds_temp=25600;ch1=0;}\r
+ if ((PIN_CH2&CH2)==0) {if (ch2==0) ch2=1;} else {ds_vdd=0x1f4;ch2=0;}\r
+ if ((PIN_CH3&CH3)==0) {if (ch3==0) ch3=1;} else {ds_vad=0x1f4;ch3=0;}\r
+ \r
+ wdcounter=10;\r
+}\r
+\r
+int testSW(void) {\r
+ uint8_t r;\r
+ DDRB&=~(1<<PORTB0); //Eingang\r
+ __asm__ __volatile__ ("nop");\r
+ PORTB|=(1<<PORTB0); //Pullup\r
+ __asm__ __volatile__ ("nop");\r
+ __asm__ __volatile__ ("nop");\r
+ __asm__ __volatile__ ("nop");\r
+ __asm__ __volatile__ ("nop");\r
+ __asm__ __volatile__ ("nop");\r
+ r=PINB&(1<<PORTB0);\r
+ __asm__ __volatile__ ("nop");\r
+ PORTB&=~(1<<PORTB0);\r
+ __asm__ __volatile__ ("nop");\r
+ DDRB|=(1<<PORTB0); //Eingang\r
+ return (r==0);\r
+}\r
+\r
+\r
+\r
+\r
+\r
+\r
+\r
+\r
+ int main(void){\r
+ PRR|=(1<<PRUSI); // usi for save Power\r
+ PORTA=0xFF; \r
+ PORTB=0xFF-(1<<PORTB0); //Schalter kann gegen Masse sein und zieht dann immer Strom\r
+ DDRB|=(1<<PORTB0); //Als Ausgang und 0\r
+ \r
+ \r
+ OWINIT();\r
+\r
+ ACSR|=(1<<ACD); //Disable Comparator\r
+ //ADCSRB|=(1<<ACME); //Disable Analog multiplexer\r
+ MCUCR &=~(1<<PUD); //All Pins Pullup...\r
+ \r
+ // Set up Watch Dog Timer for Inactivity\r
+ WDTCSR |= (1<<WDCE) ; // Enable the WD Change Bit\r
+ WDTCSR = (1<<WDIE) | // Enable WDT Interrupt\r
+ (1<<WDP2) | (1<<WDP1); // Set Timeout to ~2 seconds \r
+ \r
+ GIMSK|=(1<<PCIE0);\r
+ PCMSK0=(CH1)|(CH2)|(CH3);\r
+\r
+ \r
+ sei();\r
+ \r
+ while(1) {\r
+ if ((PIN_CH1&CH1)==0) {if (ch1==0) ch1=1;} else {ds_temp=25600;ch1=0;}\r
+ if ((PIN_CH2&CH2)==0){if (ch2==0) ch2=1;} else {ds_vdd=0x1f4;ch2=0;}\r
+ if ((PIN_CH3&CH3)==0) {if (ch3==0) ch3=1;} else {ds_vad=0x1f4;ch3=0;}\r
+\r
+ if (ch1==10) {ch1=0;ds_temp=0;};\r
+ if (ch2==10) {ch2=0;ds_vdd=0;};\r
+ if (ch3==10) {ch3=0;ds_vad=0;};\r
+\r
+ if ((gcontrol&1)==1) {\r
+ if (ch1==1) {\r
+ ch1=2;\r
+ }\r
+ }\r
+ if ((gcontrol&2)==2) {\r
+ if ((ch2==1)) {\r
+ ch2=2;\r
+ }\r
+ }\r
+ if ((gcontrol&4)==4) {\r
+ if (ch3==1) {\r
+ ch3=2;\r
+ }\r
+ }\r
+ gcontrol=0;\r
+ \r
+\r
+ #define TEST_TIMER ((TIMSK0 & (1<<TOIE0))==0)\r
+ if (TEST_TIMER&&(mode==0)) {\r
+ MCUCR|=(1<<SE)|(1<<SM1); //Power Down, only low level on 1-Wire and pin change on PCINT wakes up\r
+ MCUCR&=~(1<<ISC01);\r
+ } else {\r
+ MCUCR|=(1<<SE);\r
+ MCUCR&=~(1<<SM1);\r
+ }\r
+ asm("SLEEP");\r
+\r
+ }\r
+\r
+\r
+ }
\ No newline at end of file
tm3d / owSlave2.git / blobdiff