-// Copyright (c) 2015, Tobias Mueller tm(at)tm3d.de\r
+// Copyright (c) 2017, Tobias Mueller tm(at)tm3d.de\r
// All rights reserved. \r
// \r
// Redistribution and use in source and binary forms, with or without \r
lds r_temp,flashmarker\r
cpi r_temp,2\r
brne hrc_jmp_flasher_inc\r
- ldi r_temp,0xC0\r
- push r_temp\r
- ldi r_temp,0x0E\r
- push r_temp\r
- ret ; Direkter Sprung zum Bootloader\r
+ JMP_FLASHER\r
hrc_jmp_flasher_inc:\r
inc r_temp\r
sts flashmarker,r_temp\r
\r
configZ owid,r_bcount\r
ld r_rwbyte,Z\r
- sts srbyte,r_rwbyte\r
+ sts srbyte,r_rwbyte ;#################### Doppelung ist schon in h_searchrom_next_bit\r
rjmp h_searchrom_next_bit\r
\r
h_searchroms_next_bit: ;next Bit lesen\r
;---------------------------------------------------\r
\r
h_fwconfiginfo:\r
- cpi r_bytep,16\r
+ cpi r_bytep,24\r
breq h_fwconfiginfo_crc\r
-#ifdef _CRC8_\r
- cpi r_bytep,17\r
+#if defined(_CRC8_) || defined( _CRC8_16_) \r
+ cpi r_bytep,25\r
breq h_fwconfiginfo_all\r
#elif defined _CRC16_\r
- cpi r_bytep,17\r
- breq h_fwconfiginfo_crc2\r
- cpi r_bytep,18\r
+ cpi r_bytep,26\r
breq h_fwconfiginfo_all\r
#else\r
- cpi r_bytep,16\r
+ cpi r_bytep,25\r
breq h_fwconfiginfo_all\r
#warning No CRC known code implemented\r
#endif\r
+h_fwconfiginfo_end:\r
configZ config_info,r_bytep\r
ld r_rwbyte,Z\r
rjmp handle_end_inc\r
h_fwconfiginfo_crc:\r
+#ifdef _CRC8_\r
lds r_rwbyte,crc\r
rjmp handle_end_inc\r
-h_fwconfiginfo_crc2:\r
- lds r_rwbyte,crc+1\r
- rjmp handle_end_inc\r
+#elif defined _CRC16_\r
+ lds r_temp,crc\r
+ com r_temp\r
+ sts config_info+24,r_temp\r
+ lds r_temp,crc+1\r
+ com r_temp\r
+ sts config_info+25,r_temp\r
+ rjmp h_fwconfiginfo_end\r
+#endif\r
h_fwconfiginfo_all:\r
rjmp handle_end_sleep\r
\r
\r
.global OWINIT\r
OWINIT:\r
-#ifndef _DIS_FLASH_\r
-; check for bootloader jumper\r
- ;vor allen anderen Registerconfigs\r
- push r_temp\r
- ldi r_temp,(1<<PUD) ;enable pullup \r
- out _SFR_IO_ADDR(MCUCR) ,r_temp\r
- sbi _SFR_IO_ADDR(PORTA),PINA5 ;internal pullup on PINA5\r
- sbi _SFR_IO_ADDR(PORTA),PINA4 ;internal pullup on PINA4\r
- rcall spause\r
- sbis _SFR_IO_ADDR(PINA),PINA5\r
- rjmp owinit_botest_end ;PinA5 nicht auf 1\r
- sbis _SFR_IO_ADDR(PINA),PINA4\r
- rjmp owinit_botest_end ;PinA4 nicht auf 1\r
- cbi _SFR_IO_ADDR(PORTA),PINA4 \r
- sbi _SFR_IO_ADDR(DDRA),PINA4 ;PINA4 AUSGANG und 0\r
- rcall spause\r
- sbic _SFR_IO_ADDR(PINA),PINA5 \r
- rjmp owinit_botest_end ;PINA5 nicht 0.... nicht verbunden\r
- cbi _SFR_IO_ADDR(DDRA),PINA4\r
- ldi r_temp,0xC0\r
push r_temp\r
- ldi r_temp,0x0E\r
- push r_temp\r
- ret ; Direkter Sprung zum Bootloader*/\r
-owinit_botest_end:\r
+#ifndef _DIS_FLASH_\r
+ CHECK_BOOTLOADER_PIN \r
#endif\r
HW_INIT //Microcontroller specific\r
CHIP_INIT //1-Wire device specific\r