Change Slave sends '0' during convert prozess on all DS18B20
[owSlave2.git] / DS2450 / DS2450.c
1
2 // Copyright (c) 2015, Tobias Mueller tm(at)tm3d.de
3 // All rights reserved.
4 //
5 // Redistribution and use in source and binary forms, with or without
6 // modification, are permitted provided that the following conditions are
7 // met:
8 //
9 //  * Redistributions of source code must retain the above copyright
10 //    notice, this list of conditions and the following disclaimer.
11 //  * Redistributions in binary form must reproduce the above copyright
12 //    notice, this list of conditions and the following disclaimer in the
13 //    documentation and/or other materials provided with the
14 //    distribution.
15 //  * All advertising materials mentioning features or use of this
16 //    software must display the following acknowledgement: This product
17 //    includes software developed by tm3d.de and its contributors.
18 //  * Neither the name of tm3d.de nor the names of its contributors may
19 //    be used to endorse or promote products derived from this software
20 //    without specific prior written permission.
21 //
22 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
23 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
24 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
25 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
26 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
27 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
28 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
29 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
30 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
32 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33
34 #define F_CPU 8000000UL
35 #include <avr/io.h>
36 #include <avr/interrupt.h>
37 #include <util/delay.h>
38 #include <avr/wdt.h>
39 #include <avr/sleep.h>
40 #include <avr/pgmspace.h>
41
42 extern void OWINIT();
43 extern void EXTERN_SLEEP();
44
45 uint8_t owid[8]={0x20, 0xA2, 0xD9, 0x84, 0x00, 0x16, 0x02, 0x5D};/**/
46 uint8_t config_info[16]={0x06,0x09,0x06,0x09,0x06,0x09,0x06,0x09,0x02,0x00,0x00,0x00,0x00,0x00,0x00,0x00};
47
48 #if (owid>128) 
49 #error "Variable not correct"
50 #endif
51
52 extern uint8_t mode;
53 extern uint8_t gcontrol;
54 extern uint8_t reset_indicator;
55 extern uint8_t alarmflag;
56
57
58 typedef union {
59         volatile uint8_t bytes[0x20];
60         struct {
61                 //Page0
62                 uint16_t A;  //0
63                 uint16_t B;  //2
64                 uint16_t C;  //4
65                 uint16_t D;  //6
66                 //Page1
67                 uint8_t CSA1;
68                 uint8_t CSA2;
69                 uint8_t CSB1;
70                 uint8_t CSB2;
71                 uint8_t CSC1;
72                 uint8_t CSC2;
73                 uint8_t CSD1;
74                 uint8_t CSD2;
75                 //Page2
76                 uint8_t LA;
77                 uint8_t HA;
78                 uint8_t LB;
79                 uint8_t HB;
80                 uint8_t LC;
81                 uint8_t HC;
82                 uint8_t LD;
83                 uint8_t HD;
84                 //Page3
85                 uint8_t FC1;
86                 uint8_t FC2;
87                 uint8_t FC3;
88                 uint8_t FC4;
89                 uint8_t VCCP;
90                 uint8_t FC5;
91                 uint8_t FC6;
92                 uint8_t FC7;
93                 uint8_t convc1;
94                 uint8_t convc2;
95                 
96                 
97         };
98 } pack_t;
99 volatile pack_t pack;
100
101
102
103
104
105
106 int main(void){
107         pack.A=0;
108         pack.B=0;
109         pack.C=0;
110         pack.D=0;
111         pack.CSA1=0x08;
112         pack.CSA2=0x8C;
113         pack.CSB1=0x08;
114         pack.CSB2=0x8C;
115         pack.CSC1=0x08;
116         pack.CSC2=0x8C;
117         pack.CSD1=0x08;
118         pack.CSD2=0x8C;
119         pack.HA=0xFF;
120         pack.LA=0x00;
121         pack.HB=0xFF;
122         pack.LB=0x00;
123         pack.HC=0xFF;
124         pack.LC=0x00;
125         pack.HD=0xFF;
126         pack.LD=0x00;
127         pack.VCCP=0;
128         OWINIT();
129
130         MCUCR &=~(1<<PUD); //All Pins Pullup...
131         MCUCR |=(1<<BODS);
132         PORTA&=~((1<<PINA0)|(1<<PINA1)|(1<<PINA2)|(1<<PINA3));
133         ADCSRA=(1<<ADEN)|(1<ADPS0)|(1<<ADPS2);
134
135         
136         
137         gcontrol=1;
138         ADCSRB|=(1<<ADLAR); 
139         sei();
140         
141         //DDRB|=(1<<PINB1);
142
143     while(1)   {
144
145
146                 if (gcontrol) {
147                         //PORTB|=(1<<PINB1);
148                         uint8_t bb=1;
149                         uint8_t bb1=1;
150                         for(uint8_t i=0;i<4;i++){
151                                 if (pack.convc1&bb1) {
152                                         if (pack.convc2&(bb)) {pack.bytes[i*2]=0;pack.bytes[i*2+1]=0;}
153                                         bb=bb<<1;
154                                         if (pack.convc2&(bb)) {pack.bytes[i*2]=0xFF;pack.bytes[i*2+1]=0xFF;}
155                                         bb=bb<<1;
156                                 } else bb=bb<<2;
157                                 bb1=bb1<<1;                             
158                         }
159                         //CHanel A
160                         if (pack.convc1&1) {
161                                 if (pack.CSA2&0x01)     ADMUX=0; else ADMUX=0x80;
162                                 _delay_us(100);
163                                 ADCSRA|=(1<<ADSC);
164                                 while ((ADCSRA&(1<<ADSC)));
165                                 cli();pack.A=ADC;sei();
166                                 alarmflag=0;
167                                 if (pack.CSA2&0x08)  //AEH
168                                         if (pack.bytes[1]>pack.HA) {alarmflag=1;pack.CSA2|=0x20;}
169                                 if (pack.CSA2&0x04)  //AEL
170                                         if (pack.bytes[1]<pack.LA) {alarmflag=1;pack.CSA2|=0x10;}
171                         }
172
173                         if (pack.convc1&2) {
174                                 if (pack.CSB2&0x01)     ADMUX=1; else ADMUX=0x81;
175                                 _delay_us(100);
176                                 ADCSRA|=(1<<ADSC);
177                                 while ((ADCSRA&(1<<ADSC)));
178                                 cli();pack.B=ADC;sei();
179                                 if (pack.CSB2&0x08)  //AEH
180                                         if (pack.bytes[1]>pack.HB) {alarmflag=1;pack.CSB2|=0x20;}
181                                 if (pack.CSB2&0x04)  //AEL
182                                         if (pack.bytes[1]<pack.LB) {alarmflag=1;pack.CSB2|=0x10;}
183                         }
184
185                         if (pack.convc1&4) {
186                                 if (pack.CSC2&0x01)     ADMUX=2; else ADMUX=0x82;
187                                 _delay_us(100);
188                                 ADCSRA|=(1<<ADSC);
189                                 while ((ADCSRA&(1<<ADSC)));
190                                 cli();pack.C=ADC;sei();
191                                 if (pack.CSC2&0x08)  //AEH
192                                         if (pack.bytes[1]>pack.HC) {alarmflag=1;pack.CSC2|=0x20;}
193                                 if (pack.CSC2&0x04)  //AEL
194                                         if (pack.bytes[1]<pack.LC) {alarmflag=1;pack.CSC2|=0x10;}
195                         } 
196                         if (pack.convc1&8) {
197                                 if (pack.CSD2&0x01)     ADMUX=3; else ADMUX=0x83;
198                                 _delay_us(100);
199                                 ADCSRA|=(1<<ADSC);
200                                 while ((ADCSRA&(1<<ADSC)));
201                                 cli();pack.D=ADC;sei();
202                                 if (pack.CSD2&0x08)  //AEH
203                                         if (pack.bytes[1]>pack.HD) {alarmflag=1;pack.CSD2|=0x20;}
204                                 if (pack.CSD2&0x04)  //AEL
205                                         if (pack.bytes[1]<pack.LD) {alarmflag=1;pack.CSD2|=0x10;}
206                         }
207                         
208                         EXTERN_SLEEP();
209                         //PORTB&=~(1<<PINB1);
210                 }
211
212                 uint8_t bb=1;
213                 for(uint8_t i=0;i<4;i++) {
214                         if (pack.bytes[8+i*2]&0x80) {  //Chanel as output
215                                 if (pack.bytes[8+i*2]&0x40) {
216                                         DDRA|=bb;
217                                 } else {
218                                         DDRA&=~bb;
219                                 }
220                         } else {
221                                 DDRA&=~bb;
222                         }
223                         bb=bb*2;
224                 }
225                 
226 #if  defined(__AVR_ATtiny25__)||defined(__AVR_ATtiny45__)  || defined(__AVR_ATtiny85__)
227                         if (((TIMSK & (1<<TOIE0))==0)&& (mode==0))
228 #endif                  
229 #if  defined(__AVR_ATtiny24__)||defined(__AVR_ATtiny44__)  || defined(__AVR_ATtiny84__) ||defined(__AVR_ATtiny24A__)||defined(__AVR_ATtiny44A__)  || defined(__AVR_ATtiny84A__)
230                         if (((TIMSK0 & (1<<TOIE0))==0)&& (mode==0))
231 #endif
232                           {
233
234                         MCUCR|=(1<<SE)|(1<<SM1);
235                         MCUCR&=~(1<<ISC01);
236                 } else {
237                         MCUCR|=(1<<SE);
238                         MCUCR&=~(1<<SM1);
239                 }
240         //      asm("SLEEP");
241    }
242
243
244 }