DS2423_DS2423/DS2423_DS2423.c

   1 // Copyright (c) 2017, Tobias Mueller tm(at)tm3d.de\r
   2 // All rights reserved.\r
   3 //\r
   4 // Redistribution and use in source and binary forms, with or without\r
   5 // modification, are permitted provided that the following conditions are\r
   6 // met:\r
   7 //\r
   8 //  * Redistributions of source code must retain the above copyright\r
   9 //    notice, this list of conditions and the following disclaimer.\r
  10 //  * Redistributions in binary form must reproduce the above copyright\r
  11 //    notice, this list of conditions and the following disclaimer in the\r
  12 //    documentation and/or other materials provided with the\r
  13 //    distribution.\r
  14 //  * All advertising materials mentioning features or use of this\r
  15 //    software must display the following acknowledgment: This product\r
  16 //    includes software developed by tm3d.de and its contributors.\r
  17 //  * Neither the name of tm3d.de nor the names of its contributors may\r
  18 //    be used to endorse or promote products derived from this software\r
  19 //    without specific prior written permission.\r
  20 //\r
  21 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\r
  22 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\r
  23 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
  24 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT\r
  25 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,\r
  26 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\r
  27 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
  28 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
  29 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\r
  30 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\r
  31 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
  32 \r
  33 //!!!!!Max Program size 7551 Byte\r
  34 #define _CPULLUP_\r
  35 #define F_CPU 8000000UL\r
  36 #include <avr/io.h>\r
  37 #include <avr/interrupt.h>\r
  38 #include <util/delay.h>\r
  39 #include <avr/wdt.h>\r
  40 #include <avr/sleep.h>\r
  41 #include <avr/pgmspace.h>\r
  42 \r
  43 extern void OWINIT(void);\r
  44 extern void EXTERN_SLEEP(void);\r
  45 \r
  46 \r
  47 //#define FHEM_PLATINE\r
  48 //#define JOE_M\r
  49 #define W1DAQ\r
  50 \r
  51 volatile uint8_t owid1[8]={0x1D, 0x40, 0xDA, 0x84, 0x00, 0x00, 0x05, 0xBD};/**/\r
  52 volatile uint8_t owid2[8]={0x1D, 0x41, 0xDA, 0x84, 0x00, 0x00, 0x05, 0x8A};/**/\r
  53 #if RAMEND>260 //defined(__AVR_ATtiny84__)   ||defined(__AVR_ATtiny84A__)\r
  54 uint8_t config_info1[26]={9,13,9,13,9,13,9,13,0x02,19,19,19,19,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}; //+2 for CRC\r
  55 uint8_t config_info2[26]={9,13,9,13,9,13,9,13,0x02,19,19,19,19,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}; //+2 for CRC\r
  56 #endif\r
  57 #if (owid>128)\r
  58 #error "Variable not correct"\r
  59 #endif\r
  60 \r
  61 extern uint8_t mode;\r
  62 extern uint8_t gcontrol;\r
  63 extern uint8_t reset_indicator;\r
  64 \r
  65 \r
  66 \r
  67 typedef union {\r
  68         volatile uint8_t bytes[45];\r
  69         struct {\r
  70                 uint16_t addr;\r
  71                 uint8_t status;\r
  72                 uint8_t scratch[32];//3\r
  73                 uint32_t counter;  //35\r
  74                 uint32_t zero;   //39\r
  75                 uint16_t crc;  //43\r
  76         };\r
  77 } counterpack_t;\r
  78 counterpack_t pack1;\r
  79 \r
  80 //The Memory of both  Chips is the same, beause of the small memory of ATTiny44\r
  81 #define pack2 pack1\r
  82 \r
  83 volatile uint8_t lastcps;\r
  84 typedef union {\r
  85         uint32_t c32[4];\r
  86         uint8_t c8[16];\r
  87 } counters_t;\r
  88 \r
  89 volatile counters_t counters1,counters2;\r
  90 \r
  91 \r
  92 volatile uint8_t istat;\r
  93 volatile uint8_t changefromeeprom;\r
  94 \r
  95 #if  defined(__AVR_ATtiny44__)  || defined(__AVR_ATtiny84__) ||defined(__AVR_ATtiny44A__)  || defined(__AVR_ATtiny84A__)\r
  96 #define PCINT_VECTOR PCINT0_vect\r
  97 #define PIN_REG PINA\r
  98 #define PIN_DDR DDRA\r
  99 \r
 100 #ifdef FHEM_PLATINE\r
 101 #define PIN_CH3 (1<<PINA2)\r
 102 #define PIN_CH2 (1<<PINA1)\r
 103 #define PIN_CH1 (1<<PINA4)\r
 104 #define PIN_CH0 (1<<PINA3)\r
 105 //LEDS\r#define LPIN_CH2 (1<<PINB0)\r#define LDD_CH2 DDRB\r#define LPORT_CH2 PORTB\r#define LPIN_CH3 (1<<PINA5)\r#define LDD_CH3 DDRA\r#define LPORT_CH3 PORTA\r#define LPIN_CH0 (1<<PINA7)\r#define LDD_CH0 DDRA\r#define LPORT_CH0 PORTA\r#define LPIN_CH1 (1<<PINB1)\r#define LDD_CH1 DDRB\r#define LPORT_CH1 PORTB\r
 106 \r
 107 #define LED2_ON LPORT_CH2|=LPIN_CH2;\r
 108 #endif\r
 109 \r
 110 #ifdef JOE_M\r
 111 #define LED2_ON\r
 112 #define PIN_CH2 (1<<PINA4)\r
 113 #define PIN_CH3 (1<<PINA5)\r
 114 #define PIN_CH0 (1<<PINA6)\r
 115 #define PIN_CH1 (1<<PINA7)\r
 116 #endif\r
 117 \r
 118 #ifdef W1DAQ\r
 119 #define PIN_CH3 (1<<PINA1)\r
 120 #define PIN_CH2 (1<<PINA0)\r
 121 #define PIN_CH1 (1<<PINA7)\r
 122 #define PIN_CH0 (1<<PINA3)\r
 123 //LEDS\r#define LPIN_CH0 (1<<PINB1)\r#define LDD_CH0 DDRB\r#define LPORT_CH0 PORTB\r#define LPIN_CH1 (1<<PINB1)\r#define LDD_CH1 DDRB\r#define LPORT_CH1 PORTB\r#define LPIN_CH2 (1<<PINB1)\r#define LDD_CH2 DDRB\r#define LPORT_CH2 PORTB\r#define LPIN_CH3 (1<<PINB1)\r#define LDD_CH3 DDRB\r#define LPORT_CH3 PORTB\r\r
 124 #define LED2_ON LPORT_CH2&=~LPIN_CH2;\r
 125 #endif\r
 126 \r
 127 \r
 128 #define TEST_TIMER  ((TIMSK0 & (1<<TOIE0))==0)\r
 129 \r
 130 #endif\r
 131 \r
 132 \r
 133 ISR(PCINT0_vect) {\r
 134         if (((PIN_REG&PIN_CH2)==0)&&((istat&PIN_CH2)==PIN_CH2)) {       counters1.c32[2]++;LED2_ON}\r
 135         if (((PIN_REG&PIN_CH3)==0)&&((istat&PIN_CH3)==PIN_CH3)) {       counters1.c32[3]++;     LED2_ON}\r
 136         if (((PIN_REG&PIN_CH0)==0)&&((istat&PIN_CH0)==PIN_CH0)) {       counters2.c32[2]++;     LED2_ON}\r
 137         if (((PIN_REG&PIN_CH1)==0)&&((istat&PIN_CH1)==PIN_CH1)) {       counters2.c32[3]++;     LED2_ON}\r
 138         \r
 139         //Reset Switch on the FHEM_BOARD\r
 140         #ifdef FHEM_PLATINE  //clear counter\r
 141         if ((((PINA&(1<<PINA6)))==0)&&((istat&(1<<PINA6))==(1<<PINA6)))   {\r            _delay_ms(100);\r                if (((PINA&(1<<PINA6)))==0) {\r                  LPORT_CH3|=LPIN_CH3;\r                   _delay_ms(100);\r                        counters1.c32[2]=0;\r                    counters1.c32[3]=0;\r                    counters2.c32[2]=0;\r                    counters2.c32[3]=0;\r                    //counters1.c32[0]=0;\r                  //counters1.c32[1]=0;\r                  //counters2.c32[0]=0;\r                  //counters2.c32[1]=0;\r                  //count Resets\r                 counters1.c32[0]++;\r                    counters2.c32[0]++;\r                    LPORT_CH3&=~LPIN_CH3;\r          }\r              GIFR|=(1<<PCIF0);\r      }\r      #endif\r istat=PIN_REG;\r
 142         changefromeeprom=1;\r
 143 \r
 144 }\r
 145 \r
 146 \r
 147 ISR(ANA_COMP_vect) {\r
 148         if (changefromeeprom==0) return;\r
 149         if ((ACSR&(1<<ACO))!=0) {\r
 150                 _delay_ms(5);\r
 151                 if ((ACSR&(1<<ACO))!=0) {\r
 152                         //Count Savings\r
 153                         counters1.c32[1]++;\r                    counters2.c32[1]=counters1.c32[1];\r                     CLKPR=0x80;//Switch to 4 MHz\r
 154                         CLKPR=01;\r
 155                         \r
 156                         PORTB|=(1<<PINB1);\r
 157                         EEARH=0;\r
 158                         for(uint8_t i=0;i<16;i++) {\r
 159                                 uint8_t addr=i;\r
 160                                 while(EECR & (1<<EEPE));\r
 161                                 EECR = (0<<EEPM1)|(0<<EEPM0);\r
 162                                 EEARL = i;\r
 163                                 EEDR = counters1.c8[addr];\r
 164                                 EECR |= (1<<EEMPE);\r
 165                                 EECR |= (1<<EEPE);\r
 166                         }\r
 167                         for(uint8_t i=16;i<32;i++) {\r
 168                                 uint8_t addr=i-16;\r
 169                                 while(EECR & (1<<EEPE));\r
 170                                 EECR = (0<<EEPM1)|(0<<EEPM0);\r
 171                                 EEARL = i;\r
 172                                 EEDR = counters2.c8[addr];\r
 173                                 EECR |= (1<<EEMPE);\r
 174                                 EECR |= (1<<EEPE);\r
 175                         }\r
 176                         changefromeeprom=0;\r
 177                         PORTB&=~(1<<PINB1);\r
 178                         CLKPR=0x80;\r
 179                         CLKPR=0;\r
 180 #ifdef FHEM_PLATINE\r
 181                         LPORT_CH1|=LPIN_CH1;\r
 182 #endif\r
 183 #ifdef W1DAQ\r
 184                         LPORT_CH1&=~LPIN_CH1;\r
 185 #endif\r
 186                         GIFR|=(1<<INTF0);\r
 187                 }\r
 188         }\r
 189         \r
 190 }\r
 191 \r
 192 \r
 193 int main(void){\r
 194         #ifdef FHEM_PLATINE\r
 195         PRR|=(1<<PRUSI);  //Switch off usi, dont switch of ADC cause Multiplexer is used for the correct AIN1 pin\r
 196         #else\r
 197         PRR|=(1<<PRUSI)|(1<<PRADC);  //Switch off usi and adc for save Power\r
 198         #endif\r
 199         OWINIT();\r
 200         \r
 201         pack1.zero=0;\r
 202         pack2.zero=0;\r
 203         counters1.c32[0]=0;\r
 204         counters1.c32[2]=0;\r
 205         counters1.c32[1]=0;\r
 206         counters1.c32[3]=0;\r
 207         counters2.c32[0]=0;\r
 208         counters2.c32[2]=0;\r
 209         counters2.c32[1]=0;\r
 210         counters2.c32[3]=0;\r
 211         changefromeeprom=1;\r
 212         \r
 213         #if  defined(__AVR_ATtiny44__)  || defined(__AVR_ATtiny84__) || defined(__AVR_ATtiny24A__)||defined(__AVR_ATtiny44A__)  || defined(__AVR_ATtiny84A__)\r
 214 \r
 215         PORTB|=0xFF-(1<<PINB2); //Make PullUp an all Pins but not OW_PIN\r
 216         PORTA|=0xFF;\r
 217 \r
 218         #ifndef _CPULLUP_  // pullup\r
 219         PORTA&=~(PIN_CH0|PIN_CH1);\r
 220         PORTA&=~(PIN_CH2|PIN_CH3);\r
 221         #endif\r
 222 \r
 223         #if defined(FHEM_PLATINE) || defined(W1DAQ)  //LEDs\r
 224         LDD_CH0|=LPIN_CH0;\r     LPORT_CH0&=~LPIN_CH0;\r  LDD_CH1|=LPIN_CH1;\r     LPORT_CH1&=~LPIN_CH1;\r  LDD_CH2|=LPIN_CH2;\r     LPORT_CH2&=~LPIN_CH2;\r  LDD_CH3|=LPIN_CH3;\r     LPORT_CH3&=~LPIN_CH3;\r
 225         #endif\r
 226 \r
 227         GIMSK|=(1<<PCIE0);\r
 228         PCMSK0=(PIN_CH0|PIN_CH1|PIN_CH2|PIN_CH3); //Nicht ganz korrekt aber die Bits liegen gleich\r
 229 \r
 230         \r
 231         \r
 232         istat=PINA;\r
 233         #endif\r
 234 \r
 235         EEARH=0;\r
 236         uint8_t addr;\r
 237         for(uint8_t i=0;i<16;i++) {\r
 238                 addr=i;\r
 239                 while(EECR & (1<<EEPE));\r
 240                 EEARL=i;\r
 241                 EECR |= (1<<EERE);\r
 242                 counters1.c8[addr]=EEDR;\r
 243         }\r
 244         for(uint8_t i=16;i<32;i++) {\r
 245                 addr=i-16;\r
 246                 while(EECR & (1<<EEPE));\r
 247                 EEARL=i;\r
 248                 EECR |= (1<<EERE);\r
 249                 counters2.c8[addr]=EEDR;\r
 250         }\r
 251         changefromeeprom=0;  //Daten neu eingelesen\r
 252         for (uint8_t i=0;i<4;i++) {\r
 253                 if (counters1.c32[i]==0xFFFFFFFF) {\r
 254                         counters1.c32[i]=0;\r
 255                         changefromeeprom=1;  //Daten geaendert\r
 256                 }\r
 257                 //counters.c32[i]=0;\r
 258         }\r
 259         for (uint8_t i=0;i<4;i++) {\r
 260                 if (counters2.c32[i]==0xFFFFFFFF) {\r
 261                         counters2.c32[i]=0;\r
 262                         changefromeeprom=1;  //Daten geaendert\r
 263                 }\r
 264                 //counters.c32[i]=0;\r
 265         }\r
 266 \r
 267         //ACSR|=(1<<ACD);  //Disable Comparator\r
 268         ADCSRB|=(1<<ACME); //Disable Analog multiplexer\r
 269         MCUCR &=~(1<<PUD); //All Pins Pullup...\r
 270 #ifdef FHEM_PLATINE\r
 271         DIDR0|=(1<<ADC0D);\r
 272         PORTA&=~(1<<PINA0);//Disable Pullup\r
 273 #else\r
 274         DIDR0|=(1<<ADC2D)|(1<<ADC1D); // Disable Digital input on Analog AIN0/AIN1  (PINA1 / PINA2)\r
 275         PORTA&=~(1<<PINA2); //AIN1\r
 276 #endif\r
 277         ACSR&=~(1<<ACD);\r
 278         ACSR|=(1<<ACIE)|(1<<ACIS1)|(1<<ACIS0)|(1<<ACBG); //Enabble comperator interrupt Rising edge....(1<<ACIS0) -> minus of Comperator falls down -> output of Comperator rises\r
 279 #ifdef FHEM_PLATINE\r
 280         //Switch std AIN1 to A0\r
 281         ADCSRA&=~(1<<ADEN);\r
 282         ADCSRB=(1<<ACME);\r
 283         ADMUX=0;\r
 284         //Taster\r
 285         DDRA&=~(1<<PINA6);\r     PCMSK0|=(1<<PCINT6);\r   PORTA|=(1<<PINA6); //Pullup\r
 286 \r
 287 \r
 288         LPORT_CH0|=LPIN_CH0;\r   _delay_ms(500);\r        LPORT_CH0&=~LPIN_CH0;\r
 289 #endif\r
 290 #ifdef W1DAQ\r
 291         LPORT_CH0&=~LPIN_CH0;\r
 292         _delay_ms(500);\r        LPORT_CH0|=LPIN_CH0;\r#endif\r
 293         sei();\r
 294         while(1)   {\r
 295 #ifdef FHEM_PLATINE\r
 296                 if (LPORT_CH2&LPIN_CH2) {\r                      _delay_ms(50);\r                 LPORT_CH2&=~LPIN_CH2;\r          }\r
 297                 if (LPORT_CH1&LPIN_CH1) {\r                      _delay_ms(50);\r                 LPORT_CH1&=~LPIN_CH1;\r          }\r
 298 #endif\r
 299 #ifdef W1DAQ\r
 300                 if ((LPORT_CH2&LPIN_CH2)==0) {\r                 _delay_ms(50);\r                 LPORT_CH2|=LPIN_CH2;\r           }\r
 301 #endif\r
 302 #ifndef FHEM_PLATINE\r
 303                 if ((PINB&(1<<PORTB0))==0) {  //Jumper gesetzt ->Ruecksetzen\r
 304                         if ((counters1.c32[2]!=0)||(counters1.c32[3]!=0)||(counters2.c32[2]!=0)||(counters2.c32[3]!=0)) {\r
 305                                 counters1.c32[0]++;\r                            counters2.c32[0]++;\r                            for (uint8_t i=2;i<4;i++) {\r
 306                                         counters1.c32[i]=0;\r
 307                                         counters2.c32[i]=0;\r
 308                                 }\r
 309                                 //count Resets\r                         changefromeeprom=1;\r
 310                         }\r
 311                 }\r
 312                 #endif\r
 313                 if (((TIMSK0 & (1<<TOIE0))==0)&& (mode==0))       {\r
 314                         MCUCR|=(1<<SE)|(1<<SM1);\r
 315                         \r
 316                         MCUCR&=~(1<<ISC01);\r
 317                         } else {\r
 318                         MCUCR|=(1<<SE);\r
 319                         MCUCR&=~(1<<SM1);\r
 320                 }\r
 321                 asm("SLEEP");\r
 322 \r
 323 /*\r
 324                 MCUCR|=(1<<SE);\r
 325                 MCUCR&=~(1<<SM1);\r
 326                 asm("SLEEP");*/\r
 327         }\r
 328 \r
 329 \r
 330 }\r