Many changes from 2018
[owSlave2.git] / DS2438_ADC_DS2438_ADC / DS2438_DS2438.c
1 // Copyright (c) 2018, Tobias Mueller tm(at)tm3d.de\r
2 // All rights reserved.\r
3 //\r
4 // Redistribution and use in source and binary forms, with or without\r
5 // modification, are permitted provided that the following conditions are\r
6 // met:\r
7 //\r
8 //  * Redistributions of source code must retain the above copyright\r
9 //    notice, this list of conditions and the following disclaimer.\r
10 //  * Redistributions in binary form must reproduce the above copyright\r
11 //    notice, this list of conditions and the following disclaimer in the\r
12 //    documentation and/or other materials provided with the\r
13 //    distribution.\r
14 //  * All advertising materials mentioning features or use of this\r
15 //    software must display the following acknowledgement: This product\r
16 //    includes software developed by tm3d.de and its contributors.\r
17 //  * Neither the name of tm3d.de nor the names of its contributors may\r
18 //    be used to endorse or promote products derived from this software\r
19 //    without specific prior written permission.\r
20 //\r
21 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\r
22 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\r
23 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
24 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT\r
25 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,\r
26 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\r
27 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
28 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
29 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\r
30 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\r
31 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
32 \r
33 //!!!!!Max Program size 7551 Byte\r
34 \r
35 #define F_CPU 8000000UL\r
36 #include <avr/io.h>\r
37 #include <avr/interrupt.h>\r
38 #include <util/delay.h>  \r
39 #include <avr/wdt.h>\r
40 #include <avr/sleep.h>\r
41 #include <avr/pgmspace.h>\r
42 #include "../common/owSlave_tools.h"\r
43 \r
44 \r
45 OWST_EXTERN_VARS\r
46 OWST_WDT_ISR\r
47 \r
48 \r
49 //#define W1DAQ\r
50 #define JOE_M\r
51 volatile uint8_t owid1[8]={0x26, 0x61, 0xDA, 0x84, 0x00, 0x00, 0x03, 0x43};/**/\r
52 volatile uint8_t owid2[8]={0x26, 0x62, 0xDA, 0x84, 0x00, 0x00, 0x03, 0x1A};/**/\r
53 volatile uint8_t config_info1[26]={6,6,6,0x08, 6,8, 0x00,0x00, 0x02,20,20,20,0x00,0x00,0x00,0x00, 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00};   \r
54 volatile uint8_t config_info2[26]={6,6, 6,0x08,6,8, 0,0, 0x02,20,20,20,0,0x00,0x00,0x00, 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00};    \r
55         \r
56 #if (owid>128) \r
57 #error "Variable not correct"\r
58 #endif\r
59 \r
60 #ifdef JOE_M\r
61 #define PIN_PIOA1 (1<<PINA4)\r
62 #define ADMA1 PINA4\r
63 #define PIN_PIOB1 (1<<PINA5)\r
64 #define ADMB1 PINA5\r
65 #define PIN_PIOA2 (1<<PINA6)\r
66 #define ADMA2 PINA6\r
67 #define PIN_PIOB2 (1<<PINA7)\r
68 #define ADMB2 PINA7\r
69 #define ADDIFF1 0b011010\r
70 #define ADDIFF1G 0b011011\r
71 #define ADDIFF2 0b011110\r
72 #define ADDIFF2G 0b011111\r
73 #endif\r
74 \r
75 #ifdef W1DAQ\r
76 #define PIN_PIOB1 (1<<PINA1)\r
77 #define ADMB1 PINA1\r
78 #define PIN_PIOA1 (1<<PINA0)\r
79 #define ADMA1 PINA0\r
80 #define PIN_PIOB2 (1<<PINA7)\r
81 #define ADMB2 PINA7\r
82 #define PIN_PIOA2 (1<<PINA3)\r
83 #define ADMA2 PINA3\r
84 #define ADDIFF1 0b001000\r
85 #define ADDIFF1G 0b001001\r
86 #define ADDIFF2 0b011000\r
87 #define ADDIFF2G 0b011001\r
88 \r
89 #endif\r
90 \r
91 \r
92 \r
93 \r
94 \r
95 typedef union {\r
96         #if  defined(__AVR_ATtiny25__)\r
97         volatile uint8_t bytes[16];\r
98         #else\r
99         volatile uint8_t bytes[64];\r
100         #endif\r
101         struct {\r
102                 uint8_t status;  //1\r
103                 int16_t temp;  //2\r
104                 uint16_t voltage;  //4\r
105                 int16_t current;  //6\r
106                 uint8_t threshold; //8\r
107                 \r
108                 uint8_t page1[8]; //9\r
109                 #if  defined(__AVR_ATtiny25__)\r
110                 #else\r
111                 uint8_t page2[8]; //17\r
112                 uint8_t page3[8]; //25\r
113                 \r
114                 uint8_t page4[8];  //33\r
115                 uint8_t page5[8];  //41\r
116                 uint8_t page6[8];  //49\r
117                 uint8_t page7[8];  //57\r
118                 \r
119                 #endif\r
120         };\r
121 } pack_t;\r
122 volatile pack_t pack2,pack1;\r
123 \r
124 \r
125 \r
126 volatile int16_t DS2438_1_TEMP;\r
127 volatile uint16_t DS2438_1_VAD;\r
128 volatile uint16_t DS2438_1_VDD;\r
129 volatile int16_t DS2438_2_TEMP;\r
130 volatile uint16_t DS2438_2_VAD;\r
131 volatile uint16_t DS2438_2_VDD;\r
132 \r
133 OWST_ADC_CONF16_FUNC\r
134 OWST_ADC_CONF16_OSS_FUNC\r
135 OWST_TESTSW\r
136 \r
137 \r
138 int main(void){\r
139          OWST_INIT_ADC_ON \r
140         pack2.page3[0]=0xF4;//Spannung\r
141         pack1.page3[0]=0xF4; //Spannung\r
142         OWINIT();\r
143         OWST_WDR_CONFIG4\r
144         OWST_EN_PULLUP\r
145         \r
146         PORTA&=~((PIN_PIOA1)|(PIN_PIOB1)|(PIN_PIOA2)|(PIN_PIOB2));\r
147         OWST_INIT_ADC\r
148         DIDR0=(PIN_PIOA1)|(PIN_PIOB1)|(PIN_PIOA2)|(PIN_PIOB2);\r
149 \r
150         //ADCSRB|=(1<<ADLAR);   Adiust left\r
151         volatile double VCC;\r
152         volatile double VAD_A,VAD_B,VAD_C,VAD_D;\r
153         \r
154         gcontrol=1;\r
155         sei();\r
156     while(1)   {\r
157                 if (gcontrol) {\r
158                         wdcounter=3;\r
159                         gcontrol=0;\r
160                                 \r
161                 }\r
162                 if (wdcounter>2) { \r
163                         \r
164                         wdcounter=0;\r
165                         ADMUX=OWST_ADCIN_REFINT;\r
166                         _delay_us(100);\r
167                         VCC=owst_ADC_runf();\r
168                         VCC=(1.079*65472.0)/VCC;\r
169                         DS2438_2_VDD=VCC*100;\r
170                         DS2438_1_VDD=VCC*100;\r
171 \r
172                         if (testSW()) {\r
173                                 ADMUX= ADDIFF1; //ADC0 + ADC1 - Gain 1\r
174                                 _delay_us(100);\r
175                                 VAD_A=owst_ADC_runf();\r
176                                 if (VAD_A<3100) {\r
177                                         ADMUX= ADDIFF1G; //ADC0 + ADC1 - Gain 20\r
178                                         _delay_us(100);\r
179                                         VAD_A=owst_ADC_runf();\r
180                                         VAD_A=VCC/20.0*VAD_A/65472.0;\r
181                                 } else {\r
182                                         VAD_A=owst_ADC_OSS_runf();\r
183                                         VAD_A=VCC*VAD_A/65472.0;\r
184                                 }\r
185                                 DS2438_1_VAD=VAD_A*100;\r
186                                 DS2438_1_TEMP=VAD_A*256;\r
187 \r
188                                 ADMUX= ADDIFF2; //ADC0 + ADC1 - Gain 1\r
189                                 _delay_us(100);\r
190                                 VAD_B=owst_ADC_runf();\r
191                                 if (VAD_B<3100) {\r
192                                         ADMUX= ADDIFF2G; //ADC0 + ADC1 - Gain 20\r
193                                         _delay_us(100);\r
194                                         VAD_B=owst_ADC_runf();\r
195                                         VAD_B=VCC/20.0*VAD_B/65472.0;\r
196                                         } else {\r
197                                         VAD_B=owst_ADC_OSS_runf();\r
198                                         VAD_B=VCC*VAD_B/65472.0;\r
199                                 }\r
200                                 DS2438_2_VAD=VAD_B*100;\r
201                                 DS2438_2_TEMP=VAD_B*256;\r
202 \r
203 \r
204 \r
205                         } else {\r
206                                 ADMUX=ADMA1;\r
207                                 _delay_us(100);\r
208                                 VAD_A=owst_ADC_OSS_runf();\r
209                                 VAD_A=VCC*VAD_A/65472.0;\r
210                                 DS2438_1_TEMP=VAD_A*256;\r
211                                 \r
212                                 ADMUX=ADMB1;\r
213                                 _delay_us(100);\r
214                                 VAD_B=owst_ADC_OSS_runf();\r
215                                 VAD_B=VCC*VAD_B/65472.0;\r
216                                 DS2438_1_VAD=VAD_B*100;\r
217                                 \r
218                                 ADMUX=ADMA2;\r
219                                 _delay_us(100);\r
220                                 VAD_C=owst_ADC_OSS_runf();\r
221                                 VAD_C=VCC*VAD_C/65472.0;\r
222                                 DS2438_2_TEMP=VAD_C*256;\r
223                                 \r
224                                 ADMUX=ADMB2;\r
225                                 _delay_us(100);\r
226                                 VAD_D=owst_ADC_OSS_runf();\r
227                                 VAD_D=VCC*VAD_D/65472.0;\r
228                                 DS2438_2_VAD=VAD_D*100;\r
229                         }\r
230                         \r
231                 \r
232 \r
233                         \r
234                 }\r
235         \r
236                 \r
237                 OWST_MAIN_END\r
238    }\r
239 \r
240 \r
241 }\r