VOC Optimation
[owSlave2.git] / DS2450 / DS2450.c
1 \r
2 // Copyright (c) 2015, Tobias Mueller tm(at)tm3d.de\r
3 // All rights reserved.\r
4 //\r
5 // Redistribution and use in source and binary forms, with or without\r
6 // modification, are permitted provided that the following conditions are\r
7 // met:\r
8 //\r
9 //  * Redistributions of source code must retain the above copyright\r
10 //    notice, this list of conditions and the following disclaimer.\r
11 //  * Redistributions in binary form must reproduce the above copyright\r
12 //    notice, this list of conditions and the following disclaimer in the\r
13 //    documentation and/or other materials provided with the\r
14 //    distribution.\r
15 //  * All advertising materials mentioning features or use of this\r
16 //    software must display the following acknowledgement: This product\r
17 //    includes software developed by tm3d.de and its contributors.\r
18 //  * Neither the name of tm3d.de nor the names of its contributors may\r
19 //    be used to endorse or promote products derived from this software\r
20 //    without specific prior written permission.\r
21 //\r
22 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\r
23 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\r
24 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
25 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT\r
26 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,\r
27 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\r
28 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
29 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
30 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\r
31 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\r
32 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
33 \r
34 #define F_CPU 8000000UL\r
35 #include <avr/io.h>\r
36 #include <avr/interrupt.h>\r
37 #include <util/delay.h>\r
38 #include <avr/wdt.h>\r
39 #include <avr/sleep.h>\r
40 #include <avr/pgmspace.h>\r
41 \r
42 extern void OWINIT();\r
43 extern void EXTERN_SLEEP();\r
44 \r
45 uint8_t owid[8]={0x20, 0xA2, 0xD9, 0x84, 0x00, 0x16, 0x02, 0x5D};/**/\r
46 uint8_t config_info[16]={0x06,0x09,0x06,0x09,0x06,0x09,0x06,0x09,0x02,0x00,0x00,0x00,0x00,0x00,0x00,0x00};\r
47 \r
48 #if (owid>128) \r
49 #error "Variable not correct"\r
50 #endif\r
51 \r
52 extern uint8_t mode;\r
53 extern uint8_t gcontrol;\r
54 extern uint8_t reset_indicator;\r
55 extern uint8_t alarmflag;\r
56 \r
57 \r
58 typedef union {\r
59         volatile uint8_t bytes[0x20];\r
60         struct {\r
61                 //Page0\r
62                 uint16_t A;  //0\r
63                 uint16_t B;  //2\r
64                 uint16_t C;  //4\r
65                 uint16_t D;  //6\r
66                 //Page1\r
67                 uint8_t CSA1;\r
68                 uint8_t CSA2;\r
69                 uint8_t CSB1;\r
70                 uint8_t CSB2;\r
71                 uint8_t CSC1;\r
72                 uint8_t CSC2;\r
73                 uint8_t CSD1;\r
74                 uint8_t CSD2;\r
75                 //Page2\r
76                 uint8_t LA;\r
77                 uint8_t HA;\r
78                 uint8_t LB;\r
79                 uint8_t HB;\r
80                 uint8_t LC;\r
81                 uint8_t HC;\r
82                 uint8_t LD;\r
83                 uint8_t HD;\r
84                 //Page3\r
85                 uint8_t FC1;\r
86                 uint8_t FC2;\r
87                 uint8_t FC3;\r
88                 uint8_t FC4;\r
89                 uint8_t VCCP;\r
90                 uint8_t FC5;\r
91                 uint8_t FC6;\r
92                 uint8_t FC7;\r
93                 uint8_t convc1;\r
94                 uint8_t convc2;\r
95                 \r
96                 \r
97         };\r
98 } pack_t;\r
99 volatile pack_t pack;\r
100 \r
101 \r
102 \r
103 \r
104 \r
105 \r
106 int main(void){\r
107         pack.A=0;\r
108         pack.B=0;\r
109         pack.C=0;\r
110         pack.D=0;\r
111         pack.CSA1=0x08;\r
112         pack.CSA2=0x8C;\r
113         pack.CSB1=0x08;\r
114         pack.CSB2=0x8C;\r
115         pack.CSC1=0x08;\r
116         pack.CSC2=0x8C;\r
117         pack.CSD1=0x08;\r
118         pack.CSD2=0x8C;\r
119         pack.HA=0xFF;\r
120         pack.LA=0x00;\r
121         pack.HB=0xFF;\r
122         pack.LB=0x00;\r
123         pack.HC=0xFF;\r
124         pack.LC=0x00;\r
125         pack.HD=0xFF;\r
126         pack.LD=0x00;\r
127         pack.VCCP=0;\r
128         OWINIT();\r
129 \r
130         MCUCR &=~(1<<PUD); //All Pins Pullup...\r
131         MCUCR |=(1<<BODS);\r
132         PORTA&=~((1<<PINA0)|(1<<PINA1)|(1<<PINA2)|(1<<PINA3));\r
133         ADCSRA=(1<<ADEN)|(1<ADPS0)|(1<<ADPS2);\r
134 \r
135         \r
136         \r
137         gcontrol=1;\r
138         ADCSRB|=(1<<ADLAR); \r
139         sei();\r
140         \r
141         //DDRB|=(1<<PINB1);\r
142 \r
143     while(1)   {\r
144 \r
145 \r
146                 if (gcontrol) {\r
147                         //PORTB|=(1<<PINB1);\r
148                         uint8_t bb=1;\r
149                         uint8_t bb1=1;\r
150                         for(uint8_t i=0;i<4;i++){\r
151                                 if (pack.convc1&bb1) {\r
152                                         if (pack.convc2&(bb)) {pack.bytes[i*2]=0;pack.bytes[i*2+1]=0;}\r
153                                         bb=bb<<1;\r
154                                         if (pack.convc2&(bb)) {pack.bytes[i*2]=0xFF;pack.bytes[i*2+1]=0xFF;}\r
155                                         bb=bb<<1;\r
156                                 } else bb=bb<<2;\r
157                                 bb1=bb1<<1;                             \r
158                         }\r
159                         //CHanel A\r
160                         if (pack.convc1&1) {\r
161                                 if (pack.CSA2&0x01)     ADMUX=0; else ADMUX=0x80;\r
162                                 _delay_us(100);\r
163                                 ADCSRA|=(1<<ADSC);\r
164                                 while ((ADCSRA&(1<<ADSC)));\r
165                                 cli();pack.A=ADC;sei();\r
166                                 alarmflag=0;\r
167                                 if (pack.CSA2&0x08)  //AEH\r
168                                         if (pack.bytes[1]>pack.HA) {alarmflag=1;pack.CSA2|=0x20;}\r
169                                 if (pack.CSA2&0x04)  //AEL\r
170                                         if (pack.bytes[1]<pack.LA) {alarmflag=1;pack.CSA2|=0x10;}\r
171                         }\r
172 \r
173                         if (pack.convc1&2) {\r
174                                 if (pack.CSB2&0x01)     ADMUX=1; else ADMUX=0x81;\r
175                                 _delay_us(100);\r
176                                 ADCSRA|=(1<<ADSC);\r
177                                 while ((ADCSRA&(1<<ADSC)));\r
178                                 cli();pack.B=ADC;sei();\r
179                                 if (pack.CSB2&0x08)  //AEH\r
180                                         if (pack.bytes[1]>pack.HB) {alarmflag=1;pack.CSB2|=0x20;}\r
181                                 if (pack.CSB2&0x04)  //AEL\r
182                                         if (pack.bytes[1]<pack.LB) {alarmflag=1;pack.CSB2|=0x10;}\r
183                         }\r
184 \r
185                         if (pack.convc1&4) {\r
186                                 if (pack.CSC2&0x01)     ADMUX=2; else ADMUX=0x82;\r
187                                 _delay_us(100);\r
188                                 ADCSRA|=(1<<ADSC);\r
189                                 while ((ADCSRA&(1<<ADSC)));\r
190                                 cli();pack.C=ADC;sei();\r
191                                 if (pack.CSC2&0x08)  //AEH\r
192                                         if (pack.bytes[1]>pack.HC) {alarmflag=1;pack.CSC2|=0x20;}\r
193                                 if (pack.CSC2&0x04)  //AEL\r
194                                         if (pack.bytes[1]<pack.LC) {alarmflag=1;pack.CSC2|=0x10;}\r
195                         } \r
196                         if (pack.convc1&8) {\r
197                                 if (pack.CSD2&0x01)     ADMUX=3; else ADMUX=0x83;\r
198                                 _delay_us(100);\r
199                                 ADCSRA|=(1<<ADSC);\r
200                                 while ((ADCSRA&(1<<ADSC)));\r
201                                 cli();pack.D=ADC;sei();\r
202                                 if (pack.CSD2&0x08)  //AEH\r
203                                         if (pack.bytes[1]>pack.HD) {alarmflag=1;pack.CSD2|=0x20;}\r
204                                 if (pack.CSD2&0x04)  //AEL\r
205                                         if (pack.bytes[1]<pack.LD) {alarmflag=1;pack.CSD2|=0x10;}\r
206                         }\r
207                         \r
208                         EXTERN_SLEEP();\r
209                         //PORTB&=~(1<<PINB1);\r
210                 }\r
211 \r
212                 uint8_t bb=1;\r
213                 for(uint8_t i=0;i<4;i++) {\r
214                         if (pack.bytes[8+i*2]&0x80) {  //Chanel as output\r
215                                 if (pack.bytes[8+i*2]&0x40) {\r
216                                         DDRA|=bb;\r
217                                 } else {\r
218                                         DDRA&=~bb;\r
219                                 }\r
220                         } else {\r
221                                 DDRA&=~bb;\r
222                         }\r
223                         bb=bb*2;\r
224                 }\r
225                 \r
226 #if  defined(__AVR_ATtiny25__)||defined(__AVR_ATtiny45__)  || defined(__AVR_ATtiny85__)\r
227                         if (((TIMSK & (1<<TOIE0))==0)&& (mode==0))\r
228 #endif                  \r
229 #if  defined(__AVR_ATtiny24__)||defined(__AVR_ATtiny44__)  || defined(__AVR_ATtiny84__) ||defined(__AVR_ATtiny24A__)||defined(__AVR_ATtiny44A__)  || defined(__AVR_ATtiny84A__)\r
230                         if (((TIMSK0 & (1<<TOIE0))==0)&& (mode==0))\r
231 #endif\r
232                           {\r
233 \r
234                         MCUCR|=(1<<SE)|(1<<SM1);\r
235                         MCUCR&=~(1<<ISC01);\r
236                 } else {\r
237                         MCUCR|=(1<<SE);\r
238                         MCUCR&=~(1<<SM1);\r
239                 }\r
240         //      asm("SLEEP");\r
241    }\r
242 \r
243 \r
244 }