Many changes from 2018
[owSlave2.git] / DS2450_BME680 / DS2450_BME680.c
1 \r
2 // Copyright (c) 2017, Tobias Mueller tm(at)tm3d.de\r
3 // All rights reserved.\r
4 //\r
5 // Redistribution and use in source and binary forms, with or without\r
6 // modification, are permitted provided that the following conditions are\r
7 // met:\r
8 //\r
9 //  * Redistributions of source code must retain the above copyright\r
10 //    notice, this list of conditions and the following disclaimer.\r
11 //  * Redistributions in binary form must reproduce the above copyright\r
12 //    notice, this list of conditions and the following disclaimer in the\r
13 //    documentation and/or other materials provided with the\r
14 //    distribution.\r
15 //  * All advertising materials mentioning features or use of this\r
16 //    software must display the following acknowledgement: This product\r
17 //    includes software developed by tm3d.de and its contributors.\r
18 //  * Neither the name of tm3d.de nor the names of its contributors may\r
19 //    be used to endorse or promote products derived from this software\r
20 //    without specific prior written permission.\r
21 //\r
22 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\r
23 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\r
24 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
25 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT\r
26 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,\r
27 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\r
28 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
29 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
30 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\r
31 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\r
32 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
33 \r
34 #define F_CPU 8000000UL\r
35 #include <avr/io.h>\r
36 #include <avr/interrupt.h>\r
37 #include <util/delay.h>\r
38 #include <avr/wdt.h>\r
39 #include <avr/sleep.h>\r
40 #include <avr/pgmspace.h>\r
41 #include "../common/I2C/TWI_Master.h"\r
42 #include "../common/I2C/BME680.h"\r
43 \r
44 extern void OWINIT();\r
45 extern void EXTERN_SLEEP();\r
46 \r
47 uint8_t owid[8]={0x20, 0xA2, 0xD9, 0x84, 0x00, 0x16, 0x23, 0x20};/**/\r
48 //uint8_t config_info[26]={0x03,13,0x03,13,0x03,13,0x3,15,0x02,20,20,20,20,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00};\r
49 //uint8_t config_info[26]={1,14,4,8,2,8,11,18,0x02,24,24,24,24,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00};\r
50 uint8_t config_info[26]={1,13,4,13,2,8,11,8,0x02,24,24,24,24,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00};\r
51 \r
52 \r
53 #if (owid>128) \r
54 #error "Variable not correct"\r
55 #endif\r
56 \r
57 extern uint8_t mode;\r
58 extern uint8_t gcontrol;\r
59 extern uint8_t reset_indicator;\r
60 extern uint8_t alarmflag;\r
61 volatile uint8_t wdcounter=10;\r
62 \r
63 \r
64 #if  defined(__AVR_ATtiny24__)||defined(__AVR_ATtiny44__)  || defined(__AVR_ATtiny84__) || defined(__AVR_ATtiny24A__)||defined(__AVR_ATtiny44A__)  || defined(__AVR_ATtiny84A__)\r
65 ISR(WATCHDOG_vect) {\r
66         #else\r
67         ISR(WDT_vect) {\r
68                 #endif\r
69                 wdcounter++;\r
70         //      if (reset_indicator==1) reset_indicator++;\r
71                 //else if (reset_indicator==2) mode=0;\r
72         }\r
73 \r
74 typedef union {\r
75         volatile uint8_t bytes[0x22];\r
76         struct {\r
77                 //Page0\r
78                 uint16_t A;  //0\r
79                 uint16_t B;  //2\r
80                 uint16_t C;  //4\r
81                 uint16_t D;  //6\r
82                 //Page1\r
83                 uint8_t CSA1;\r
84                 uint8_t CSA2;\r
85                 uint8_t CSB1;\r
86                 uint8_t CSB2;\r
87                 uint8_t CSC1;\r
88                 uint8_t CSC2;\r
89                 uint8_t CSD1;\r
90                 uint8_t CSD2;\r
91                 //Page2\r
92                 uint8_t LA;\r
93                 uint8_t HA;\r
94                 uint8_t LB;\r
95                 uint8_t HB;\r
96                 uint8_t LC;\r
97                 uint8_t HC;\r
98                 uint8_t LD;\r
99                 uint8_t HD;\r
100                 //Page3\r
101                 uint8_t FC1;\r
102                 uint8_t FC2;\r
103                 uint8_t FC3;\r
104                 uint8_t FC4;\r
105                 uint8_t VCCP;\r
106                 uint8_t FC5;\r
107                 uint8_t FC6;\r
108                 uint8_t FC7;\r
109                 uint8_t convc1;\r
110                 uint8_t convc2;\r
111                 \r
112                 \r
113         };\r
114 } pack_t;\r
115 volatile pack_t pack;\r
116 \r
117 \r
118 int16_t T;\r
119 uint16_t H;\r
120 uint32_t P;\r
121 uint16_t G;\r
122 \r
123 \r
124 int main(void){\r
125         pack.A=0;\r
126         pack.B=0;\r
127         pack.C=0;\r
128         pack.D=0;\r
129         pack.CSA1=0x08;\r
130         pack.CSA2=0x8C;\r
131         pack.CSB1=0x08;\r
132         pack.CSB2=0x8C;\r
133         pack.CSC1=0x08;\r
134         pack.CSC2=0x8C;\r
135         pack.CSD1=0x08;\r
136         pack.CSD2=0x8C;\r
137         pack.HA=0xFF;\r
138         pack.LA=0x00;\r
139         pack.HB=0xFF;\r
140         pack.LB=0x00;\r
141         pack.HC=0xFF;\r
142         pack.LC=0x00;\r
143         pack.HD=0xFF;\r
144         pack.LD=0x00;\r
145         pack.VCCP=0;\r
146 \r
147         PORTA=0xFF;\r
148         //PORTB=0xFF;\r
149         //PORTC=0xFF;\r
150 //      PORTD=0xFF;\r
151 \r
152         OWINIT();\r
153 \r
154         MCUCR &=~(1<<PUD); //All Pins Pullup...\r
155         MCUCR |=(1<<BODS);\r
156 \r
157         //PORTA&=~((1<<PINA0)|(1<<PINA1)|(1<<PINA2)|(1<<PINA3));\r
158 \r
159 \r
160 \r
161         WDTCSR |= (1<<WDCE) |(1<<WDE);   // Enable the WD Change Bit//| (1<<WDE)\r
162         WDTCSR  =   (1<<WDIE) |              // Enable WDT Interrupt\r
163         (1<<WDP3) | (1<<WDP0);   // Set Timeout to ~8 seconds\r
164 \r
165         wdcounter=4;\r
166         \r
167         gcontrol=1;\r
168         TWI_Master_Initialise();\r
169         \r
170         initBME680();\r
171         sei();\r
172         \r
173         //DDRB|=(1<<PINB1);\r
174 \r
175     while(1)   {\r
176                 if (wdcounter>1) {\r
177                         readBMP680(&T,&H,&P,&G);\r
178                         wdcounter=0;\r
179                 }\r
180 \r
181                 if (gcontrol) {\r
182                         //PORTB|=(1<<PINB1);\r
183                         uint8_t bb=1;\r
184                         uint8_t bb1=1;\r
185                         for(uint8_t i=0;i<4;i++){\r
186                                 if (pack.convc1&bb1) {\r
187                                         if (pack.convc2&(bb)) {pack.bytes[i*2]=0;pack.bytes[i*2+1]=0;}\r
188                                         bb=bb<<1;\r
189                                         if (pack.convc2&(bb)) {pack.bytes[i*2]=0xFF;pack.bytes[i*2+1]=0xFF;}\r
190                                         bb=bb<<1;\r
191                                 } else bb=bb<<2;\r
192                                 bb1=bb1<<1;                             \r
193                         }\r
194                         //CHanel A\r
195                         if (pack.convc1&1) {\r
196                                 \r
197                                 //cli();pack.A=rlight[0];sei();\r
198                                 //cli();pack.A=r_gain;sei();\r
199                                 //cli();pack.A=T+32767;sei();\r
200                                 cli();pack.A=T;sei();\r
201                                 alarmflag=0;\r
202                                 if (pack.CSA2&0x08)  //AEH\r
203                                         if (pack.bytes[1]>pack.HA) {alarmflag=1;pack.CSA2|=0x20;}\r
204                                 if (pack.CSA2&0x04)  //AEL\r
205                                         if (pack.bytes[1]<pack.LA) {alarmflag=1;pack.CSA2|=0x10;}\r
206                         }\r
207 \r
208                         if (pack.convc1&2) {\r
209                                 //cli();pack.B=rlight[1];sei();\r
210                                 //cli();pack.B=atime;sei();\r
211                                 cli();pack.B=H;sei();\r
212                                 if (pack.CSB2&0x08)  //AEH\r
213                                         if (pack.bytes[1]>pack.HB) {alarmflag=1;pack.CSB2|=0x20;}\r
214                                 if (pack.CSB2&0x04)  //AEL\r
215                                         if (pack.bytes[1]<pack.LB) {alarmflag=1;pack.CSB2|=0x10;}\r
216                         }\r
217 \r
218                         if (pack.convc1&4) {\r
219                                 //cli();pack.C=rlight[2];sei();\r
220                                 cli();pack.C=P/10;sei();\r
221                                 if (pack.CSC2&0x08)  //AEH\r
222                                         if (pack.bytes[1]>pack.HC) {alarmflag=1;pack.CSC2|=0x20;}\r
223                                 if (pack.CSC2&0x04)  //AEL\r
224                                         if (pack.bytes[1]<pack.LC) {alarmflag=1;pack.CSC2|=0x10;}\r
225                         } \r
226                         if (pack.convc1&8) {\r
227                                 //cli();pack.D=rlight[3];sei();\r
228                                 cli();pack.D=G;sei();\r
229                                 if (pack.CSD2&0x08)  //AEH\r
230                                         if (pack.bytes[1]>pack.HD) {alarmflag=1;pack.CSD2|=0x20;}\r
231                                 if (pack.CSD2&0x04)  //AEL\r
232                                         if (pack.bytes[1]<pack.LD) {alarmflag=1;pack.CSD2|=0x10;}\r
233                         }\r
234                         \r
235                         EXTERN_SLEEP();\r
236                         //PORTB&=~(1<<PINB1);\r
237                 }\r
238 \r
239                 uint8_t bb=1;\r
240                 for(uint8_t i=0;i<4;i++) {\r
241                         if (pack.bytes[8+i*2]&0x80) {  //Chanel as output\r
242                                 if (pack.bytes[8+i*2]&0x40) {\r
243                                         //DDRA|=bb;\r
244                                 } else {\r
245                                         //DDRA&=~bb;\r
246                                 }\r
247                         } else {\r
248                                 //DDRA&=~bb;\r
249                         }\r
250                         bb=bb*2;\r
251                 }\r
252                 \r
253 #if  defined(__AVR_ATtiny25__)||defined(__AVR_ATtiny45__)  || defined(__AVR_ATtiny85__)\r
254                         if (((TIMSK & (1<<TOIE0))==0)&& (mode==0))\r
255 #endif                  \r
256 #if  defined(__AVR_ATtiny24__)||defined(__AVR_ATtiny44__)  || defined(__AVR_ATtiny84__) ||defined(__AVR_ATtiny24A__)||defined(__AVR_ATtiny44A__)  || defined(__AVR_ATtiny84A__) ||defined(__AVR_ATmega168__)||defined(__AVR_ATmega168A__)  ||defined(__AVR_ATmega328__) ||defined(__AVR_ATmega328P__) ||defined(__AVR_ATmega328PB__)\r
257 \r
258                         if (((TIMSK0 & (1<<TOIE0))==0)&& (mode==0))\r
259 #endif\r
260                           {\r
261 \r
262                         MCUCR|=(1<<SE)|(1<<SM1);\r
263                         MCUCR&=~(1<<ISC01);\r
264                 } else {\r
265                         MCUCR|=(1<<SE);\r
266                         MCUCR&=~(1<<SM1);\r
267                 }\r
268                 asm("SLEEP");\r
269    }\r
270 \r
271 \r
272 }