2 // Copyright (c) 2017, Tobias Mueller tm(at)tm3d.de
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3 // All rights reserved.
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5 // Redistribution and use in source and binary forms, with or without
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6 // modification, are permitted provided that the following conditions are
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9 // * Redistributions of source code must retain the above copyright
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10 // notice, this list of conditions and the following disclaimer.
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11 // * Redistributions in binary form must reproduce the above copyright
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12 // notice, this list of conditions and the following disclaimer in the
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13 // documentation and/or other materials provided with the
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15 // * All advertising materials mentioning features or use of this
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16 // software must display the following acknowledgement: This product
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17 // includes software developed by tm3d.de and its contributors.
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18 // * Neither the name of tm3d.de nor the names of its contributors may
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19 // be used to endorse or promote products derived from this software
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20 // without specific prior written permission.
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22 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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23 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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24 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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25 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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26 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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27 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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28 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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29 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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30 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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31 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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32 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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34 #define _CHANGEABLE_ID_
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35 #define _ZERO_POLLING_
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36 //#define _HANDLE_CC_COMMAND_
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41 #include "../common/OWConfig.s"
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42 #include "../common/OWCRC16.s"
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44 .extern pin_state1,1
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45 .extern pin_state1,1
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46 .extern pin_state2,1
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50 .macro CHIP_INIT ;r_temp is pushed other Registers should be saved
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53 .macro COMMAND_TABLE
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57 rjmp h_accesswrite_read1
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61 rjmp h_accesswrite_read2
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64 #include "../common/OWRomFunctionsDual.s"
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65 #include "../common/OWTimerInterrupt.s"
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69 ; Ab hier Geraeteabhaenging
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70 #define OW_ACCESSREAD1 OW_FIRST_COMMAND+0
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71 #define OW_ACCESSWRITE1 OW_FIRST_COMMAND+1
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72 #define OW_ACCESSWRITE_READ1 OW_FIRST_COMMAND+2
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75 #define OW_ACCESSREAD2 OW_FIRST_COMMAND+3
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76 #define OW_ACCESSWRITE2 OW_FIRST_COMMAND+4
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77 #define OW_ACCESSWRITE_READ2 OW_FIRST_COMMAND+5
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80 ;---------------------------------------------------
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81 ; READ COMMAND and start operation
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82 ;---------------------------------------------------
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87 FLASH_COMMANDS ; muss zu erst sein....
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89 cjmp 0xF5,hrc_accessread1
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90 cset 0x5A,OW_ACCESSWRITE1
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91 /* cset 0xBE,OW_READ_SCRATCHPAD_ADR2
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92 cset 0x4E,OW_WRITE_SCRATCHPAD_ADR2
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93 cjmp 0x44,hrc_set_convertT2
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94 cjmp 0xB4,hrc_set_convertV2*/
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96 //cljmp 0x85,hrc_fw_configinfo2
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97 #ifdef _CHANGEABLE_ID_
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100 rjmp handle_end_sleep
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105 ldi r_mode,OW_ACCESSREAD1
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107 lds r_temp,pin_state1
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109 mov r_rwbyte,r_temp
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119 h_accesswrite_read1:
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120 //lds r_rwbyte,pin_state1
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121 rjmp handle_end_sleep
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127 breq h_accesswrite_compl1
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129 rjmp handle_end_inc
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130 h_accesswrite_compl1:
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134 brne h_accesswrite_error1
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135 sts pin_set1,r_rwbyte
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136 ldi r_mode,OW_ACCESSWRITE_READ1
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139 rjmp handle_end_inc
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140 h_accesswrite_error1:
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141 rjmp handle_end_sleep
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148 ;*****************************************************************************************************************************************************************************************
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149 ;*****************************************************************************************************************************************************************************************
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150 ;*****************************************************************************************************************************************************************************************
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151 ;*****************************************************************************************************************************************************************************************
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152 ;*****************************************************************************************************************************************************************************************
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157 #ifndef _DIS_FLASH_
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158 FLASH_COMMANDS ; muss zu erst sein....
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160 cjmp 0xF5,hrc_accessread2
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161 cset 0x5A,OW_ACCESSWRITE2
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162 /* cset 0xBE,OW_READ_SCRATCHPAD_ADR2
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163 cset 0x4E,OW_WRITE_SCRATCHPAD_ADR2
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164 cjmp 0x44,hrc_set_convertT2
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165 cjmp 0xB4,hrc_set_convertV2*/
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167 //cljmp 0x85,hrc_fw_configinfo2
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168 #ifdef _CHANGEABLE_ID_
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171 rjmp handle_end_sleep
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176 ldi r_mode,OW_ACCESSREAD2
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178 lds r_temp,pin_state2
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180 mov r_rwbyte,r_temp
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190 h_accesswrite_read2:
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191 //lds r_rwbyte,pin_state2
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192 rjmp handle_end_sleep
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198 breq h_accesswrite_compl2
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200 rjmp handle_end_inc
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201 h_accesswrite_compl2:
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205 brne h_accesswrite_error2
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206 sts pin_set2,r_rwbyte
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207 ldi r_mode,OW_ACCESSWRITE_READ2
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210 rjmp handle_end_inc
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211 h_accesswrite_error2:
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212 rjmp handle_end_sleep
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214 ;---------------------------------------------------
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216 ;---------------------------------------------------
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217 h_writescratchpad_adr2:
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221 #if defined(__AVR_ATtiny25__)
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222 andi r_rwbyte,0x01 ;nur Page 0 und 1 und das immer wiederholen
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225 ldi r_mode,OW_WRITE_SCRATCHPAD2
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228 h_writescratchpad2:
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230 breq h_writescratchpad_all2
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233 configZ pack2,r_temp
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235 rjmp handle_end_inc
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236 h_writescratchpad_all2:
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237 rjmp handle_end_sleep
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247 #include "../common/OWPinInterrupt.s"
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