1 // Copyright (c) 2015, Tobias Mueller tm(at)tm3d.de
2 // All rights reserved.
4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions are
8 // * Redistributions of source code must retain the above copyright
9 // notice, this list of conditions and the following disclaimer.
10 // * Redistributions in binary form must reproduce the above copyright
11 // notice, this list of conditions and the following disclaimer in the
12 // documentation and/or other materials provided with the
14 // * All advertising materials mentioning features or use of this
15 // software must display the following acknowledgement: This product
16 // includes software developed by tm3d.de and its contributors.
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18 // be used to endorse or promote products derived from this software
19 // without specific prior written permission.
21 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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39 .macro cljmp val,addr; Weiter sprung, wenn das ziel zu weit entfernt fuer brxx
46 .macro cset val,mod ;Nur der Mode wird gesetzt. Abkuerzung da oft nur das noch bleibt
58 #define OW_READ_ROM_COMMAND 1
60 #define OW_SEARCHROMS 3 ;next send two bit
61 #define OW_SEARCHROMR 4 ; next resive master answer
63 #define OW_READ_COMMAND 6
66 #ifdef _CHANGEABLE_ID_
67 #define OW_WRITE_NEWID 7
68 #define OW_READ_NEWID 8
69 #define OW_SET_NEWID 9
70 #define OW_FIRST_COMMAND 10
74 .macro CHANGE_ID_COMMANDS
75 cset 0x75,OW_WRITE_NEWID
76 cljmp 0xA7,hrc_set_readid
77 cljmp 0x79,hrc_set_setid
82 #define OW_FIRST_COMMAND 7
86 ; test auf run flasher command 0x88 in h_readcommand
91 1: ldi r_temp,0 ;Anderes Kommando flashmarker zuruecksetzen...
92 sts flashmarker,r_temp
98 #ifdef _CHANGEABLE_ID_
99 ; lesen der ID aus dem EEPROM beim Start
101 ldi r_temp2,lo8(E2END)
104 out _SFR_IO_ADDR(EEARH), zh
109 sbic _SFR_IO_ADDR(EECR), EEPE
110 rjmp read_EEPROM_ID_loop
111 out _SFR_IO_ADDR(EEARL),r_temp2
112 sbi _SFR_IO_ADDR(EECR), EERE
113 in r_rwbyte,_SFR_IO_ADDR(EEDR)
115 breq read_EEPROM_ID_end
120 brne read_EEPROM_ID_loop
131 rjmp handle_end_no_bcount // sleep eventuell reset, nichts tun und auf Timeout warten
132 rjmp h_readromcommand
138 #ifdef _CHANGEABLE_ID_
149 cset 0x55,OW_MATCHROM
150 cjmp 0xF0,hrc_set_searchrom
151 cjmp 0xCC,hrc_start_read_command ;skip rom
152 cjmp 0x33,hrc_set_read_rom
153 cjmp 0xEC,hrc_set_alarm_search
155 rjmp handle_end_sleep
160 lds r_temp,flashmarker
162 brne hrc_jmp_flasher_inc
167 ret ; Direkter Sprung zum Bootloader
170 sts flashmarker,r_temp
171 rjmp handle_end_sleep
176 lds r_rwbyte,owid ;erstes Byte lesen
177 rjmp h_searchrom_next_bit
179 hrc_start_read_command: ;Skip rom und Matchrom ok...
180 ldi r_mode,OW_READ_COMMAND
185 ldi r_mode,OW_READROM
189 hrc_set_alarm_search:
192 brne hrc_set_searchrom ;alarm flag nicht 0 also gehe zu searchrom
194 rjmp handle_end_sleep
196 ;---------------------------------------------------
198 ;---------------------------------------------------
206 rjmp handle_end_sleep
210 breq hrc_start_read_command ;Starten von Read Command
215 ;---------------------------------------------------
217 ;---------------------------------------------------
220 h_searchrom_next_bit: ;Setup next Bit of ID
221 sts srbyte,r_rwbyte ;erstes Byte speichern von der Aufrufenden Ebene
223 com r_rwbyte ; negieren
224 ror r_temp2 ; erstes unnegiertes bit in Carry
225 rol r_rwbyte ;und dann als erstes bit in r_rwbyte
227 ldi r_bcount,0x40 ; zwei bits sensden dann zu Searchromr
228 ldi r_mode,OW_SEARCHROMR
229 rjmp handle_end_no_bcount
233 h_searchroms: ; Modus Send zwei bit
235 sbrc r_rwbyte,7 ; bit gesetz (1 empfangen)
237 lds r_bcount,srbyte ;r_bcount wird am ende gesetzt
240 rjmp h_searchroms_next ; Vergleich des letzen gelesenen bits mit der id
245 rjmp handle_end_sleep
246 h_searchroms_next: ; Setup next bit
247 inc r_bytep ; zaehler der Bits erhoehen
248 sbrc r_bytep,6 ; 64 bit erreicht
249 rjmp h_searchrom_end_ok ;alles ok auf Command warten
252 brne h_searchroms_next_bit ; bit zwischen 0 und 8
253 mov r_bcount,r_bytep ; next Byte lesen
258 configZ owid,r_bcount
261 rjmp h_searchrom_next_bit
263 h_searchroms_next_bit: ;next Bit lesen
264 ;sts srbytep,r_bcount
266 lsr r_rwbyte ;aktuelles byte weiterschieben r_rwbyte hier zweckefrei verwendet
267 rjmp h_searchrom_next_bit ;algemeine routine zum vorbereiten
270 rjmp hrc_start_read_command
274 ldi r_mode,OW_SEARCHROMS
276 rjmp handle_end_no_bcount
279 ;---------------------------------------------------
281 ;---------------------------------------------------
290 rjmp handle_end_sleep
293 ;---------------------------------------------------
294 ; CHANGE ROM FUNCTIONS
295 ;---------------------------------------------------
298 #ifdef _CHANGEABLE_ID_
301 configZ newid,r_bytep
307 rjmp handle_end_sleep
311 ldi r_mode,OW_READ_NEWID
316 configZ newid,r_bytep
321 rjmp handle_end_sleep
324 ldi r_mode,OW_SET_NEWID
325 ;ldi r_bytep,1 ;start to write in 2
326 rjmp handle_end_inc ;set r_bytep to 1!!!
332 brne h_setid_bad_code_all
339 rjmp h_setid_bad_code_all ;sollte eigentlich nicht passieren
347 ldi r_temp2,lo8(E2END)
351 ;ldi r_temp,0 ;kommt nicht vor das ein E2ROM genau n*256+(0 bis 7) byte gross ist
353 out _SFR_IO_ADDR(EEARH),zh
357 h_setid_EEPROM_write:
358 sbic _SFR_IO_ADDR(EECR), EEPE
359 rjmp h_setid_EEPROM_write
360 ldi r_temp, (0<<EEPM1)|(0<<EEPM0)
361 out _SFR_IO_ADDR(EECR), r_temp
362 ;nur adresse L schreiben H bleibt aus oben genannten grund gleich.
363 out _SFR_IO_ADDR(EEARL),r_temp2
365 out _SFR_IO_ADDR(EEDR), r_rwbyte
366 sbi _SFR_IO_ADDR(EECR), EEMPE
367 sbi _SFR_IO_ADDR(EECR), EEPE
371 brne h_setid_EEPROM_write
373 h_setid_bad_code_all:
374 rjmp handle_end_sleep
392 ; check for bootloader jumper
393 ;vor allen anderen Registerconfigs
395 ldi r_temp,(1<<PUD) ;enable pullup
396 out _SFR_IO_ADDR(MCUCR) ,r_temp
397 sbi _SFR_IO_ADDR(PORTA),PINA5 ;internal pullup on PINA5
398 sbi _SFR_IO_ADDR(PORTA),PINA4 ;internal pullup on PINA4
400 sbis _SFR_IO_ADDR(PINA),PINA5
401 rjmp owinit_botest_end ;PinA5 nicht auf 1
402 sbis _SFR_IO_ADDR(PINA),PINA4
403 rjmp owinit_botest_end ;PinA4 nicht auf 1
404 cbi _SFR_IO_ADDR(PORTA),PINA4
405 sbi _SFR_IO_ADDR(DDRA),PINA4 ;PINA4 AUSGANG und 0
407 sbic _SFR_IO_ADDR(PINA),PINA5
408 rjmp owinit_botest_end ;PINA5 nicht 0.... nicht verbunden
409 cbi _SFR_IO_ADDR(DDRA),PINA4
414 ret ; Direkter Sprung zum Bootloader*/
417 HW_INIT //Microcontroller specific
418 CHIP_INIT //1-Wire device specific
419 #ifdef _CHANGEABLE_ID_