Change Slave sends '0' during convert prozess on all DS18B20
[owSlave2.git] / DS18B20_Thermocouble / DS18B20_TC.c
1
2 // Copyright (c) 2015, Tobias Mueller tm(at)tm3d.de
3 // All rights reserved.
4 //
5 // Redistribution and use in source and binary forms, with or without
6 // modification, are permitted provided that the following conditions are
7 // met:
8 //
9 //  * Redistributions of source code must retain the above copyright
10 //    notice, this list of conditions and the following disclaimer.
11 //  * Redistributions in binary form must reproduce the above copyright
12 //    notice, this list of conditions and the following disclaimer in the
13 //    documentation and/or other materials provided with the
14 //    distribution.
15 //  * All advertising materials mentioning features or use of this
16 //    software must display the following acknowledgement: This product
17 //    includes software developed by tm3d.de and its contributors.
18 //  * Neither the name of tm3d.de nor the names of its contributors may
19 //    be used to endorse or promote products derived from this software
20 //    without specific prior written permission.
21 //
22 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
23 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
24 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
25 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
26 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
27 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
28 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
29 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
30 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
32 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33
34 #define F_CPU 8000000UL
35 #include <avr/io.h>
36 #include <avr/interrupt.h>
37 #include <util/delay.h>
38 #include <avr/wdt.h>
39 #include <avr/sleep.h>
40 #include <avr/pgmspace.h>
41
42 extern void OWINIT();
43 extern void EXTERN_SLEEP();
44
45 const float k_rs[54] PROGMEM ={0.000000,24.125000,48.585366,72.731707,96.829268,121.097561,145.700000,170.600000,195.650000,220.625000,245.365854,269.853659,294.119048,318.195122,342.166667,366.000000,389.761905,413.428571,437.023810,460.558140,484.047619,507.511628,530.976190,554.418605,577.883721,601.395349,624.952381,648.571429,672.285714,696.073171,719.976190,744.000000,768.146341,792.439024,816.853659,841.414634,866.125000,890.975000,916.000000,941.179487,966.525000,992.025641,1017.717949,1043.589744,1069.657895,1095.945946,1122.432432,1149.184211,1176.189189,1203.472222,1231.083333,1259.000000,1287.285714,1315.941176};
46 //const float j_rs[70] PROGMEM ={0, 18.302913, 34.830476, 50.783019, 70.653704, 90.505455, 110.341818, 130.165455, 149.163636, 160.791071, 180.596364, 200.398214, 220.200000, 240.000000, 250.882883, 270.603636, 290.409091, 310.216364, 330.025455, 342.472727, 360.649091, 380.461818, 400.275000, 420.087273, 435.275676, 450.703636, 470.503636, 490.298214, 510.082456, 523.486726, 540.621053, 560.370175, 580.105172, 591.979487, 610.527119, 630.213559, 644.601653, 660.534426, 680.168852, 690.787097, 710.391935, 729.123810, 740.559375, 760.126562, 770.684615, 790.235385, 800.782812, 820.331250, 834.681250, 850.446032, 870.017460, 880.600000, 900.196774, 911.099187, 930.432787, 950.073333, 960.728333, 980.396667, 1000.078333, 1010.772881, 1030.475862, 1050.187931, 1065.717241, 1080.631034, 1100.358621, 1120.089655, 1131.840000,1150.556897, 1170.294737, 1190.035088};
47         double gettemp_rs(double V) {
48                 uint8_t iv=(uint8_t)(V);
49                 float t0=pgm_read_float(&(k_rs[iv]));
50                 float t1=pgm_read_float(&(k_rs[iv+1]));
51                 return t0+(t1-t0)/1*(V-iv);
52         }
53
54
55 uint8_t owid[8]={0x28, 0xA2, 0xD9, 0x84, 0x00, 0x16, 0x02, 0xAC};/**/
56 uint8_t config_info[16]={0x01,0x02,0x00,0x00,0x00,0x00,0x00,0x00,0x02,0x00,0x00,0x00,0x00,0x00,0x00,0x00};
57         
58 #if (owid>128) 
59 #error "Variable not correct"
60 #endif
61
62 extern uint8_t mode;
63 extern uint8_t gcontrol;
64 extern uint8_t reset_indicator;
65 extern uint8_t alarmflag;
66
67
68 volatile uint8_t wdcounter;
69
70
71 typedef union {
72         volatile uint8_t bytes[8];
73         struct {
74                 uint16_t temp;  //0
75                 uint8_t TH;  //2
76                 uint8_t TL;  //3
77                 uint8_t config;  //4
78                 uint8_t rrFF; //5
79                 uint8_t rr00; //6
80                 uint8_t rr10; //7
81         };
82 } pack_t;
83 volatile pack_t pack;
84
85
86
87
88 #if  defined(__AVR_ATtiny24__)||defined(__AVR_ATtiny44__)  || defined(__AVR_ATtiny84__) || defined(__AVR_ATtiny24A__)||defined(__AVR_ATtiny44A__)  || defined(__AVR_ATtiny84A__)
89 ISR(WATCHDOG_vect) {
90 #else
91 ISR(WDT_vect) {
92 #endif 
93         //sleep_disable();          // Disable Sleep on Wakeup
94         wdcounter++;
95         if (reset_indicator==1) reset_indicator++;
96         else if (reset_indicator==2) mode=0;
97 /*      if (timeout==2) {
98                 DIS_TIMER;
99                 EN_OWINT;
100                 mode=OWM_SLEEP;
101         }
102         timeout++;*/
103         //sleep_enable();           // Enable Sleep Mode
104
105 }
106
107
108 #define OWM_PORT PORTA
109 #define OWM_PIN PINA
110 #define OWM_PINN PINA0
111 #define OWM_DD DDRA
112
113 #define OWM_SET_LOW OWM_PORT&=~(1<<OWM_PINN);OWM_DD|=(1<<OWM_PINN)
114 #define OWM_SET_HIGH OWM_DD&=~(1<<OWM_PINN);OWM_PORT|=(1<<OWM_PINN)
115
116 #define OWM_IS_LOW ((OWM_PIN & (1<<OWM_PINN))==0)
117
118
119 void owm_init() {
120         OWM_PORT|=(1<<OWM_PINN); //PULL UP
121         OWM_DD&=~(1<<OWM_PINN);
122 }
123
124 #define owm_delay(us1)  _delay_us(us1)
125
126 uint8_t owm_reset() {
127         OWM_SET_LOW;
128         owm_delay(480);
129         OWM_SET_HIGH;
130         owm_delay(60);
131         if (OWM_IS_LOW) {owm_delay(420); return 1;} else {owm_delay(420); return 0;}
132         
133         
134 }
135
136 void owm_rw(uint8_t *b) {
137         uint8_t i;
138         uint8_t pp=1;
139         for(i=0;i<8;i++) {
140                 if (pp&b[0]) {
141                         OWM_SET_LOW;
142                         owm_delay(6);
143                         OWM_SET_HIGH;
144                         owm_delay(9);
145                         if (OWM_IS_LOW) {
146                                 b[0]&=~pp;
147                         }
148                         owm_delay(80-6-9);
149                         
150                         } else {
151                         OWM_SET_LOW;
152                         owm_delay(60);
153                         OWM_SET_HIGH;
154                         owm_delay(20);
155                 }
156                 pp=(pp<<1);
157         }
158 }
159
160 void owm_block(uint8_t count, uint8_t *buf){
161         uint8_t i;
162         for(i=0;i<count;i++) {
163                 owm_rw(buf+i);
164         }
165 }
166
167 inline int16_t ow_fconvert(uint8_t b1, uint8_t b2) {
168         int16_t tsht;
169         tsht=b1  |((int)b2<<8);
170         if (b2 & 0x080)
171         tsht |= 0xFFFFF0000;
172         return tsht;
173 }
174 volatile double V,ktemp;
175
176 uint16_t ADmess() {
177          ADMUX=0b10001101;
178          ADCSRA|=(1<<ADSC);
179          while ((ADCSRA&(1<<ADSC)));
180         return ADC;
181 }
182
183 int main(void){
184     //PRR|=(1<<PRUSI)|(1<<PRADC);  //Switch off usi and adc for save Power
185         pack.temp=0x0550;
186         pack.config=0x7F;
187         pack.TH=75;
188         pack.TL=70;
189         pack.rrFF=0xFF;
190         pack.rr00=0;
191         pack.rr10=0x10;
192         PORTA=0xFF-(1<<PINA1)-(1<<PINA2);
193         PORTB=0xFF;
194         OWINIT();
195
196         MCUCR &=~(1<<PUD); //All Pins Pullup...
197         MCUCR |=(1<<BODS);
198
199         WDTCSR |= ((1<<WDCE) );   // Enable the WD Change Bit//| (1<<WDE)
200         WDTCSR |=   (1<<WDIE) |              // Enable WDT Interrupt
201         (1<<WDP2) | (1<<WDP1);   // Set Timeout to ~1 seconds
202         MCUSR=0;
203         uint8_t block[13];
204         sei();
205         ADCSRA=(1<<ADEN)|(1<<ADPS2)|(1<<ADPS1)|(1<<ADPS0);
206         owm_init();
207         owm_reset();
208         block[0]=0xCC;
209         block[1]=0x4E;
210         block[2]=0;
211         block[3]=0;
212         block[4]=0x1F;
213         owm_block(5,block);
214         owm_reset();
215         block[0]=0x33;
216         for(uint8_t i=1;i<9;i++) {
217                 block[i]=0xFF;
218         }
219         owm_block(9,block);
220         
221         if (block[1]==0x28) {  //DS18B20 angeschlossen
222                 for(uint8_t i=0;i<8;i++) {
223                         owid[i]=block[i+1];
224                 }
225                 while(EECR & (1<<EEPE));
226                 EEAR=E2END-7;
227                 EECR|=(1<EERE);
228                 if (EEDR!=0x28) { //Wenn keine ID im Eeprom uebernimm es
229                         for(uint8_t a=0;a<8;a++) {
230                                 while(EECR & (1<<EEPE));
231                                 EECR = (0<<EEPM1)|(0<<EEPM0);
232                                 EEAR = E2END-7+a;
233                                 EEDR = block[a+1];
234                                 EECR |= (1<<EEMPE);
235                                 EECR |= (1<<EEPE);
236                         }
237                 }
238         }
239         
240         uint16_t ares[16],sum;
241         uint8_t par=0;
242         ares[0]=0;//ADmess();
243         for (par=1;par<16;par++) {
244                 ares[par]=ares[0];
245         }
246         par=0;
247         wdcounter=0;
248         gcontrol=1;
249
250     while(1)   {
251                 if (wdcounter>0) {
252                         ares[par]=ADmess();
253                         par++;
254                         if (par>15) par=0;
255                         wdcounter=0;
256                 }
257                 if (gcontrol) {
258                         PORTB|=(1<<PORTB0);
259                         sum=0;
260                         for(uint8_t i=0;i<16;i++) {
261                                 sum+=ares[i];
262                         }
263                         V=sum/20.0/1024.0*1.12*1000.0/16.0;
264                         //V=sum/20.0/1024.0*1.01*1000.0/16.0;
265                         ktemp=gettemp_rs(V);
266                         owm_reset();
267                         block[0]=0xCC;
268                         block[1]=0x44;
269                         owm_block(2,block);
270                         _delay_ms(100);
271                         owm_reset();
272                         block[0]=0xCC;
273                         block[1]=0xBE;
274                         for(uint8_t i=0;i<9;i++) block[i+2]=0xFF;
275                         owm_block(11,block);
276                         uint16_t htemp;
277                         if (PINB&(1<<PINB0)) {
278                                 htemp=(ktemp*16+(block[2]|(block[3]<<8)))/10;
279                         } else {
280                                 
281                                 htemp=ktemp*16+(block[2]|(block[3]<<8));
282                         }
283                         uint8_t t8=pack.temp>>4;
284                         uint8_t af=0;
285                         if (t8>pack.TH) af=1;
286                         if (t8<=pack.TL) af=1;
287                         cli();
288                         pack.temp=htemp;
289                         alarmflag=af;
290                         sei();
291                         EXTERN_SLEEP();
292                         PORTB&=~(1<<PORTB0);
293                 }
294
295                 
296 #if  defined(__AVR_ATtiny25__)||defined(__AVR_ATtiny45__)  || defined(__AVR_ATtiny85__)
297                         if (((TIMSK & (1<<TOIE0))==0)&& (mode==0))
298 #endif                  
299 #if  defined(__AVR_ATtiny24__)||defined(__AVR_ATtiny44__)  || defined(__AVR_ATtiny84__) ||defined(__AVR_ATtiny24A__)||defined(__AVR_ATtiny44A__)  || defined(__AVR_ATtiny84A__)
300                         if (((TIMSK0 & (1<<TOIE0))==0)&& (mode==0))
301 #endif
302                           {
303 //                      CLKPR=(1<<CLKPCE);
304         //              CLKPR=(1<<CLKPS2); /*0.5Mhz*/
305 //                      PORTB&=~(1<<PINB1);
306                         MCUCR|=(1<<SE)|(1<<SM1);
307                         MCUCR&=~(1<<ISC01);
308                 } else {
309                         MCUCR|=(1<<SE);
310                         MCUCR&=~(1<<SM1);
311                 }
312                 asm("SLEEP");
313    }
314
315
316 }