Many changes from 2018
[owSlave2.git] / DS2450_LPS225HB / DS2450_LPS225HB.c
1 // Copyright (c) 2018, Tobias Mueller tm(at)tm3d.de\r
2 // All rights reserved.\r
3 //\r
4 // Redistribution and use in source and binary forms, with or without\r
5 // modification, are permitted provided that the following conditions are\r
6 // met:\r
7 //\r
8 //  * Redistributions of source code must retain the above copyright\r
9 //    notice, this list of conditions and the following disclaimer.\r
10 //  * Redistributions in binary form must reproduce the above copyright\r
11 //    notice, this list of conditions and the following disclaimer in the\r
12 //    documentation and/or other materials provided with the\r
13 //    distribution.\r
14 //  * All advertising materials mentioning features or use of this\r
15 //    software must display the following acknowledgement: This product\r
16 //    includes software developed by tm3d.de and its contributors.\r
17 //  * Neither the name of tm3d.de nor the names of its contributors may\r
18 //    be used to endorse or promote products derived from this software\r
19 //    without specific prior written permission.\r
20 //\r
21 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\r
22 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\r
23 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
24 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT\r
25 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,\r
26 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\r
27 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
28 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
29 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\r
30 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\r
31 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
32 \r
33 #define F_CPU 8000000UL\r
34 #include <avr/io.h>\r
35 #include <avr/interrupt.h>\r
36 #include <util/delay.h>\r
37 #include <avr/wdt.h>\r
38 #include <avr/sleep.h>\r
39 #include <avr/pgmspace.h>\r
40 #include "../common/I2C/USI_TWI_Master.h"\r
41 #include "../common/I2C/LPS225HB.h"\r
42 extern void OWINIT();\r
43 extern void EXTERN_SLEEP();\r
44 \r
45 uint8_t owid[8]={0x20, 0xA2, 0xD9, 0x84, 0x00, 0x16, 0x02, 0x5D};/**/\r
46 uint8_t config_info[26]={0x02,16,0x01,14, 0,0, 0x0,0,0x02,14,14,0x00,0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00};\r
47 #if (owid>128) \r
48 #error "Variable not correct"\r
49 #endif\r
50 \r
51 extern uint8_t mode;\r
52 extern uint8_t gcontrol;\r
53 extern uint8_t reset_indicator;\r
54 extern uint8_t alarmflag;\r
55 volatile uint8_t wdcounter=10;\r
56 \r
57 \r
58 #if  defined(__AVR_ATtiny24__)||defined(__AVR_ATtiny44__)  || defined(__AVR_ATtiny84__) || defined(__AVR_ATtiny24A__)||defined(__AVR_ATtiny44A__)  || defined(__AVR_ATtiny84A__)\r
59 ISR(WATCHDOG_vect) {\r
60 #else\r
61 ISR(WDT_vect) {\r
62 #endif \r
63         wdcounter++;\r
64         if (reset_indicator==1) reset_indicator++;\r
65         else if (reset_indicator==2) mode=0;\r
66 }\r
67 \r
68 typedef union {\r
69         volatile uint8_t bytes[0x20];\r
70         struct {\r
71                 //Page0\r
72                 uint16_t A;  //0\r
73                 uint16_t B;  //2\r
74                 uint16_t C;  //4\r
75                 uint16_t D;  //6\r
76                 //Page1\r
77                 uint8_t CSA1;\r
78                 uint8_t CSA2;\r
79                 uint8_t CSB1;\r
80                 uint8_t CSB2;\r
81                 uint8_t CSC1;\r
82                 uint8_t CSC2;\r
83                 uint8_t CSD1;\r
84                 uint8_t CSD2;\r
85                 //Page2\r
86                 uint8_t LA;\r
87                 uint8_t HA;\r
88                 uint8_t LB;\r
89                 uint8_t HB;\r
90                 uint8_t LC;\r
91                 uint8_t HC;\r
92                 uint8_t LD;\r
93                 uint8_t HD;\r
94                 //Page3\r
95                 uint8_t FC1;\r
96                 uint8_t FC2;\r
97                 uint8_t FC3;\r
98                 uint8_t FC4;\r
99                 uint8_t VCCP;\r
100                 uint8_t FC5;\r
101                 uint8_t FC6;\r
102                 uint8_t FC7;\r
103                 uint8_t convc1;\r
104                 uint8_t convc2;\r
105                 \r
106                 \r
107         };\r
108 } pack_t;\r
109 volatile pack_t pack;\r
110 \r
111 \r
112 \r
113 volatile int16_t am2302_temp;\r
114 volatile uint16_t am2302_hum;\r
115 \r
116 \r
117 uint8_t userRegister[1];\r
118 int16_t sRH,sT;\r
119 volatile double temperatureC,humidityRH;\r
120 uint32_t P;\r
121 int16_t t;\r
122 \r
123 \r
124 \r
125 \r
126 int main(void){\r
127         pack.A=0;\r
128         pack.B=0;\r
129         pack.C=0;\r
130         pack.D=0;\r
131         pack.CSA1=0x08;\r
132         pack.CSA2=0x8C;\r
133         pack.CSB1=0x08;\r
134         pack.CSB2=0x8C;\r
135         pack.CSC1=0x08;\r
136         pack.CSC2=0x8C;\r
137         pack.CSD1=0x08;\r
138         pack.CSD2=0x8C;\r
139         pack.HA=0xFF;\r
140         pack.LA=0x00;\r
141         pack.HB=0xFF;\r
142         pack.LB=0x00;\r
143         pack.HC=0xFF;\r
144         pack.LC=0x00;\r
145         pack.HD=0xFF;\r
146         pack.LD=0x00;\r
147         pack.VCCP=0;\r
148     PORTB=0xFF-(1<<PORTB0); //Schalter kann gegen Masse sein und zieht dann immer Strom\r
149         DDRB|=(1<<PORTB0); //Als Ausgang und 0\r
150         PORTA=0xFF;  //All Pull up;\r
151          PRR|=(1<<PRADC);  // adc for save Power\r
152 \r
153         ACSR|=(1<<ACD);  //Disable Comparator\r
154         OWINIT();\r
155 \r
156         MCUCR &=~(1<<PUD); //All Pins Pullup...\r
157         MCUCR |=(1<<BODS);\r
158         WDTCSR |= ((1<<WDCE) );   // Enable the WD Change Bit//| (1<<WDE)\r
159         WDTCSR |=   (1<<WDIE) |              // Enable WDT Interrupt\r
160         (1<<WDP3) | (1<<WDP0);   // Set Timeout to ~8 seconds\r
161         \r
162         gcontrol=1;\r
163         \r
164         USI_TWI_Master_Initialise();\r
165         LPS225HB_Init() ;\r
166         \r
167         sei();\r
168         \r
169         //DDRB|=(1<<PINB1);\r
170 \r
171     while(1)   {\r
172         \r
173         if (wdcounter>3) {      \r
174                 LPS225HB_Readi(&t,&P);\r
175                 \r
176         \r
177                 wdcounter=0;\r
178         }\r
179         \r
180 \r
181                 \r
182                 \r
183 \r
184 \r
185                 if (gcontrol) {\r
186                         //PORTB|=(1<<PINB1);\r
187                         uint8_t bb=1;\r
188                         uint8_t bb1=1;\r
189                         for(uint8_t i=0;i<4;i++){\r
190                                 if (pack.convc1&bb1) {\r
191                                         if (pack.convc2&(bb)) {pack.bytes[i*2]=0;pack.bytes[i*2+1]=0;}\r
192                                         bb=bb<<1;\r
193                                         if (pack.convc2&(bb)) {pack.bytes[i*2]=0xFF;pack.bytes[i*2+1]=0xFF;}\r
194                                         bb=bb<<1;\r
195                                 } else bb=bb<<2;\r
196                                 bb1=bb1<<1;                             \r
197                         }\r
198                         //CHanel A\r
199                         if (pack.convc1&1) {\r
200                                 /*if (pack.CSA2&0x01)   ADMUX=0; else ADMUX=0x80;\r
201                                 _delay_us(100);\r
202                                 ADCSRA|=(1<<ADSC);\r
203                                 while ((ADCSRA&(1<<ADSC)));\r
204                                 cli();pack.A=ADC;sei();*/\r
205                                 cli();pack.A=P/128;sei();\r
206                                 wdcounter=10;\r
207                                 alarmflag=0;\r
208                                 if (pack.CSA2&0x08)  //AEH\r
209                                         if (pack.bytes[1]>pack.HA) {alarmflag=1;pack.CSA2|=0x20;}\r
210                                 if (pack.CSA2&0x04)  //AEL\r
211                                         if (pack.bytes[1]<pack.LA) {alarmflag=1;pack.CSA2|=0x10;}\r
212                         }\r
213 \r
214                         if (pack.convc1&2) {\r
215                                 /*if (pack.CSB2&0x01)   ADMUX=1; else ADMUX=0x81;\r
216                                 _delay_us(100);\r
217                                 ADCSRA|=(1<<ADSC);\r
218                                 while ((ADCSRA&(1<<ADSC)));\r
219                                 cli();pack.B=ADC;sei();*/\r
220                                 wdcounter=10;\r
221                                 uint16_t ct=(t)+32767;\r
222                                 cli();pack.B=ct;sei();\r
223                                 if (pack.CSB2&0x08)  //AEH\r
224                                         if (pack.bytes[1]>pack.HB) {alarmflag=1;pack.CSB2|=0x20;}\r
225                                 if (pack.CSB2&0x04)  //AEL\r
226                                         if (pack.bytes[1]<pack.LB) {alarmflag=1;pack.CSB2|=0x10;}\r
227                         }\r
228 \r
229                         if (pack.convc1&4) {\r
230                                 /*if (pack.CSC2&0x01)   ADMUX=2; else ADMUX=0x82;\r
231                                 _delay_us(100);\r
232                                 ADCSRA|=(1<<ADSC);\r
233                                 while ((ADCSRA&(1<<ADSC)));\r
234                                 cli();pack.C=ADC;sei();*/\r
235                                 wdcounter=10;\r
236                                 cli();pack.C=0;sei();\r
237                                 if (pack.CSC2&0x08)  //AEH\r
238                                         if (pack.bytes[1]>pack.HC) {alarmflag=1;pack.CSC2|=0x20;}\r
239                                 if (pack.CSC2&0x04)  //AEL\r
240                                         if (pack.bytes[1]<pack.LC) {alarmflag=1;pack.CSC2|=0x10;}\r
241                         } \r
242                         if (pack.convc1&8) {\r
243                                 /*if (pack.CSD2&0x01)   ADMUX=3; else ADMUX=0x83;\r
244                                 _delay_us(100);\r
245                                 ADCSRA|=(1<<ADSC);\r
246                                 while ((ADCSRA&(1<<ADSC)));\r
247                                 cli();pack.D=ADC;sei();*/\r
248                                 wdcounter=10;\r
249                                 cli();pack.D=0;sei();\r
250                                 if (pack.CSD2&0x08)  //AEH\r
251                                         if (pack.bytes[1]>pack.HD) {alarmflag=1;pack.CSD2|=0x20;}\r
252                                 if (pack.CSD2&0x04)  //AEL\r
253                                         if (pack.bytes[1]<pack.LD) {alarmflag=1;pack.CSD2|=0x10;}\r
254                         }\r
255                         \r
256                         EXTERN_SLEEP();\r
257                         //PORTB&=~(1<<PINB1);\r
258                 }\r
259 \r
260                 /*uint8_t bb=1;\r
261                 for(uint8_t i=0;i<4;i++) {\r
262                         if (pack.bytes[8+i*2]&0x80) {  //Chanel as output\r
263                                 if (pack.bytes[8+i*2]&0x40) {\r
264                                         DDRA|=bb;\r
265                                 } else {\r
266                                         DDRA&=~bb;\r
267                                 }\r
268                         } else {\r
269                                 DDRA&=~bb;\r
270                         }\r
271                         bb=bb*2;\r
272                 }*/\r
273                 \r
274 #if  defined(__AVR_ATtiny25__)||defined(__AVR_ATtiny45__)  || defined(__AVR_ATtiny85__)\r
275                         if (((TIMSK & (1<<TOIE0))==0)&& (mode==0))\r
276 #endif                  \r
277 #if  defined(__AVR_ATtiny24__)||defined(__AVR_ATtiny44__)  || defined(__AVR_ATtiny84__) ||defined(__AVR_ATtiny24A__)||defined(__AVR_ATtiny44A__)  || defined(__AVR_ATtiny84A__)\r
278                         if (((TIMSK0 & (1<<TOIE0))==0)&& (mode==0))\r
279 #endif\r
280                           {\r
281 \r
282                         MCUCR|=(1<<SE)|(1<<SM1);\r
283                         MCUCR&=~(1<<ISC01);\r
284                 } else {\r
285                         MCUCR|=(1<<SE);\r
286                         MCUCR&=~(1<<SM1);\r
287                 }\r
288         //      asm("SLEEP");\r
289    }\r
290 \r
291 \r
292 }